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Reel/Frame:	042166/0431			Pages:	71
		Recorded:	04/05/2017
Conveyance:	SECURITY AGREEMENT

Total properties: 764
Page 3 of 8
Pages: 1 2 3 4 5 6 7 8

1

Patent #:	7701957	Issue Dt:	04/20/2010	Application #:	11040063	Filing Dt:	01/19/2005
Title:	METHOD AND APPARATUS FOR SWITCHING, MERGING, AND DEMERGING DATA BETWEEN DATA COMMUNICATION LOCATIONS

2

Patent #:	7523232	Issue Dt:	04/21/2009	Application #:	11040637	Filing Dt:	01/21/2005
Publication #:	US20060018176	Pub Dt:	01/26/2006
Title:	MARK/RE-READ AND MARK/RE-WRITE OPERATIONS IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

3

Patent #:	7257687	Issue Dt:	08/14/2007	Application #:	11040804	Filing Dt:	01/21/2005
Publication #:	US20060020741	Pub Dt:	01/26/2006
Title:	SYNCHRONIZATION OF ACTIVE FLAG AND STATUS BUS FLAGS IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

4

Patent #:	7870310	Issue Dt:	01/11/2011	Application #:	11040892	Filing Dt:	01/21/2005
Publication #:	US20060018177	Pub Dt:	01/26/2006
Title:	MULTIPLE COUNTERS TO RELIEVE FLAG RESTRICTION IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

5

Patent #:	7269700	Issue Dt:	09/11/2007	Application #:	11040893	Filing Dt:	01/21/2005
Publication #:	US20060020742	Pub Dt:	01/26/2006
Title:	STATUS BUS ACCESSING ONLY AVAILABLE QUADRANTS DURING LOOP MODE OPERATION IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

6

Patent #:	7099231	Issue Dt:	08/29/2006	Application #:	11040895	Filing Dt:	01/21/2005
Publication #:	US20060018170	Pub Dt:	01/26/2006
Title:	INTERLEAVING MEMORY BLOCKS TO RELIEVE TIMING BOTTLENECK IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

7

Patent #:	7805552	Issue Dt:	09/28/2010	Application #:	11040896	Filing Dt:	01/21/2005
Publication #:	US20060020761	Pub Dt:	01/26/2006
Title:	PARTIAL PACKET WRITE AND WRITE DATA FILTERING IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

8

Patent #:	8230174	Issue Dt:	07/24/2012	Application #:	11040926	Filing Dt:	01/21/2005
Publication #:	US20060020743	Pub Dt:	01/26/2006
Title:	MULTI-QUEUE ADDRESS GENERATOR FOR START AND END ADDRESSES IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

9

Patent #:	7154327	Issue Dt:	12/26/2006	Application #:	11040927	Filing Dt:	01/21/2005
Publication #:	US20060017497	Pub Dt:	01/26/2006
Title:	SELF-TIMED MULTIPLE BLANKING FOR NOISE SUPPRESSION DURING FLAG GENERATION IN A MULTI-QUEUE FIRST-IN FIRST-OUT MEMORY SYSTEM

10

Patent #:	7166966	Issue Dt:	01/23/2007	Application #:	11054350	Filing Dt:	02/08/2005
Publication #:	US20050200293	Pub Dt:	09/15/2005
Title:	PENLIGHT AND TOUCH SCREEN DATA INPUT SYSTEM AND METHOD FOR FLAT PANEL DISPLAYS

11

Patent #:	7522395	Issue Dt:	04/21/2009	Application #:	11063703	Filing Dt:	02/22/2005
Title:	ELECTROSTATIC DISCHARGE AND ELECTRICAL OVERSTRESS PROTECTION CIRCUIT

12

Patent #:	7214990	Issue Dt:	05/08/2007	Application #:	11063704	Filing Dt:	02/22/2005
Title:	MEMORY CELL WITH REDUCED SOFT ERROR RATE

13

Patent #:	7583087	Issue Dt:	09/01/2009	Application #:	11064038	Filing Dt:	02/22/2005
Publication #:	US20060190790	Pub Dt:	08/24/2006
Title:	IN-SITU MONITOR OF PROCESS AND DEVICE PARAMETERS IN INTEGRATED CIRCUITS

14

Patent #:	7353345	Issue Dt:	04/01/2008	Application #:	11075049	Filing Dt:	03/07/2005
Title:	EXTERNAL OBSERVATION AND CONTROL OF DATA IN A COMPUTING PROCESSOR

15

Patent #:	7447812	Issue Dt:	11/04/2008	Application #:	11080704	Filing Dt:	03/15/2005
Title:	MULTI-QUEUE FIFO MEMORY DEVICES THAT SUPPORT FLOW-THROUGH OF WRITE AND READ COUNTER UPDATES USING MULTI-PORT FLAG COUNTER REGISTER FILES

16

Patent #:	7227423	Issue Dt:	06/05/2007	Application #:	11084962	Filing Dt:	03/21/2005
Publication #:	US20050206462	Pub Dt:	09/22/2005
Title:	MONOLITHIC CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

17

Patent #:	7227424	Issue Dt:	06/05/2007	Application #:	11085372	Filing Dt:	03/21/2005
Publication #:	US20050206464	Pub Dt:	09/22/2005
Title:	TRANSCONDUCTANCE AND CURRENT MODULATION FOR RESONANT FREQUENCY CONTROL AND SELECTION

18

Patent #:	7574580	Issue Dt:	08/11/2009	Application #:	11089459	Filing Dt:	03/25/2005
Publication #:	US20060008257	Pub Dt:	01/12/2006
Title:	INTELLIGENT CACHING SCHEME FOR STREAMING FILE SYSTEMS

19

Patent #:	7378289	Issue Dt:	05/27/2008	Application #:	11100144	Filing Dt:	04/05/2005
Title:	Method for forming photomask having test patterns in blading areas

20

Patent #:	7472322	Issue Dt:	12/30/2008	Application #:	11141223	Filing Dt:	05/31/2005
Title:	ON-CHIP INTERFACE TRAP CHARACTERIZATION AND MONITORING

21

Patent #:	7594149	Issue Dt:	09/22/2009	Application #:	11142758	Filing Dt:	05/31/2005
Publication #:	US20060190785	Pub Dt:	08/24/2006
Title:	IN-SITU MONITOR OF PROCESS AND DEVICE PARAMETERS IN INTEGRATED CIRCUITS

22

Patent #:	7944876	Issue Dt:	05/17/2011	Application #:	11143010	Filing Dt:	06/01/2005
Publication #:	US20050271045	Pub Dt:	12/08/2005
Title:	TIME SLOT INTERCHANGE SWITCH WITH BIT ERROR RATE TESTING

23

Patent #:	7392354	Issue Dt:	06/24/2008	Application #:	11144881	Filing Dt:	06/03/2005
Title:	MULTI-QUEUE FIFO MEMORY DEVICES THAT SUPPORT A BACKED-OFF STANDARD MODE OF OPERATION AND METHODS OF OPERATING SAME

24

Patent #:	7420626	Issue Dt:	09/02/2008	Application #:	11167682	Filing Dt:	06/27/2005
Title:	SYSTEMS AND METHODS FOR DETECTING A CHANGE IN A SEQUENCE OF INTERLACED DATA FIELDS GENERATED FROM A PROGRESSIVE SCAN SOURCE

25

Patent #:	7450184	Issue Dt:	11/11/2008	Application #:	11167756	Filing Dt:	06/27/2005
Title:	CIRCUITS AND METHODS FOR DETECTING 2:2 ENCODED VIDEO AND SYSTEMS UTILIZING THE SAME

26

Patent #:	7522214	Issue Dt:	04/21/2009	Application #:	11167877	Filing Dt:	06/27/2005
Title:	CIRCUITS AND METHODS FOR DEINTERLACING VIDEO DISPLAY DATA AND SYSTEMS USING THE SAME

27

Patent #:	7414671	Issue Dt:	08/19/2008	Application #:	11172323	Filing Dt:	06/30/2005
Title:	SYSTEMS AND METHODS FOR DISPLAY OBJECT EDGE DETECTION AND PIXEL DATA INTERPOLATION IN VIDEO PROCESSING SYSTEMS

28

Patent #:	7382159	Issue Dt:	06/03/2008	Application #:	11179071	Filing Dt:	07/12/2005
Title:	HIGH VOLTAGE INPUT BUFFER

29

Patent #:	7227400	Issue Dt:	06/05/2007	Application #:	11179072	Filing Dt:	07/12/2005
Title:	HIGH SPEED MOSFET OUTPUT DRIVER

30

Patent #:	7715377	Issue Dt:	05/11/2010	Application #:	11185072	Filing Dt:	07/19/2005
Publication #:	US20050254330	Pub Dt:	11/17/2005
Title:	APPARATUS AND METHOD FOR MATRIX MEMORY SWITCHING ELEMENT

31

Patent #:	7259614	Issue Dt:	08/21/2007	Application #:	11187680	Filing Dt:	07/22/2005
Title:	VOLTAGE SENSING CIRCUIT

32

Patent #:	8447902	Issue Dt:	05/21/2013	Application #:	11198512	Filing Dt:	08/05/2005
Publication #:	US20070030938	Pub Dt:	02/08/2007
Title:	METHOD AND APPARATUS FOR PREDICTIVE SWITCHING

33

Patent #:	7538824	Issue Dt:	05/26/2009	Application #:	11206402	Filing Dt:	08/18/2005
Title:	SYSTEMS AND METHODS FOR REDUCING NOISE DURING VIDEO DEINTERLACING

34

Patent #:	7053661	Issue Dt:	05/30/2006	Application #:	11207370	Filing Dt:	08/19/2005
Title:	IMPEDANCE-MATCHED OUTPUT DRIVER CIRCUITS HAVING ENHANCED PREDRIVER CONTROL

35

Patent #:	7093083	Issue Dt:	08/15/2006	Application #:	11207552	Filing Dt:	08/19/2005
Title:	INTEGRATED CIRCUIT MEMORY DEVICES HAVING ASYNCHRONOUS FLOW-THROUGH CAPABILITY

36

Patent #:	7408751	Issue Dt:	08/05/2008	Application #:	11229195	Filing Dt:	09/15/2005
Title:	SELF-BIASED ELECTROSTATIC DISCHARGE PROTECTION METHOD AND CIRCUIT

37

Patent #:	7456699	Issue Dt:	11/25/2008	Application #:	11232407	Filing Dt:	09/20/2005
Publication #:	US20060071734	Pub Dt:	04/06/2006
Title:	FREQUENCY CONTROLLER FOR A MONOLITHIC CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

38

Patent #:	7248124	Issue Dt:	07/24/2007	Application #:	11232409	Filing Dt:	09/20/2005
Publication #:	US20060071718	Pub Dt:	04/06/2006
Title:	FREQUENCY CALIBRATION FOR A MONOLITHIC CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

39

Patent #:	7307486	Issue Dt:	12/11/2007	Application #:	11233414	Filing Dt:	09/21/2005
Publication #:	US20060017519	Pub Dt:	01/26/2006
Title:	LOW-LATENCY START-UP FOR A MONOLITHIC CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

40

Patent #:	7342420	Issue Dt:	03/11/2008	Application #:	11234911	Filing Dt:	09/26/2005
Publication #:	US20060066354	Pub Dt:	03/30/2006
Title:	LOW POWER OUTPUT DRIVER

41

Patent #:	7675790	Issue Dt:	03/09/2010	Application #:	11239907	Filing Dt:	09/30/2005
Title:	OVER DRIVING PIN FUNCTION SELECTION METHOD AND CIRCUIT

42

Patent #:	7573896	Issue Dt:	08/11/2009	Application #:	11250873	Filing Dt:	10/14/2005
Publication #:	US20060083185	Pub Dt:	04/20/2006
Title:	METHOD AND APPARATUS FOR GENERIC INTERFACE, PACKET CUT-THROUGH, OVERBOOKING, QUEUE CONCATENATION, AND LOGICAL IDENTIFICATION PRIORITY FOR A SYSTEM PACKET INTERFACE DEVICE

43

Patent #:	7239188	Issue Dt:	07/03/2007	Application #:	11264111	Filing Dt:	11/01/2005
Title:	LOCKED-LOOP INTEGRATED CIRCUITS HAVING SPEED TRACKING CIRCUITS THEREIN

44

Patent #:	7724860	Issue Dt:	05/25/2010	Application #:	11277705	Filing Dt:	03/28/2006
Publication #:	US20070230650	Pub Dt:	10/04/2007
Title:	AUTO-ADAPTIVE DIGITAL PHASE-LOCKED LOOP FOR LARGE FREQUENCY MULTIPLICATION FACTORS

45

Patent #:	7400178	Issue Dt:	07/15/2008	Application #:	11278368	Filing Dt:	03/31/2006
Publication #:	US20070234251	Pub Dt:	10/04/2007
Title:	DATA OUTPUT CLOCK SELECTION CIRCUIT FOR QUAD-DATA RATE INTERFACE

46

Patent #:	7292064	Issue Dt:	11/06/2007	Application #:	11278370	Filing Dt:	03/31/2006
Publication #:	US20070236249	Pub Dt:	10/11/2007
Title:	MINIMIZING TIMING SKEW AMONG CHIP LEVEL OUTPUTS FOR REGISTERED OUTPUT SIGNALS

47

Patent #:	7375558	Issue Dt:	05/20/2008	Application #:	11314683	Filing Dt:	12/21/2005
Publication #:	US20070139091	Pub Dt:	06/21/2007
Title:	METHOD AND APPARATUS FOR PRE-CLOCKING

48

Patent #:	7565597	Issue Dt:	07/21/2009	Application #:	11315971	Filing Dt:	12/21/2005
Title:	FAST PARITY SCAN OF MEMORY ARRAYS

49

Patent #:	7321238	Issue Dt:	01/22/2008	Application #:	11317066	Filing Dt:	12/22/2005
Title:	OVER-VOLTAGE TOLERANT MULTIFUNCTION INPUT STAGE

50

Patent #:	7400026	Issue Dt:	07/15/2008	Application #:	11342134	Filing Dt:	01/26/2006
Publication #:	US20060118910	Pub Dt:	06/08/2006
Title:	THIN FILM RESISTOR STRUCTURE

51

Patent #:	7518844	Issue Dt:	04/14/2009	Application #:	11352496	Filing Dt:	02/10/2006
Title:	OVER-VOLTAGE TOLERANT ESD PROTECTION CIRCUIT

52

Patent #:	7298221	Issue Dt:	11/20/2007	Application #:	11353832	Filing Dt:	02/13/2006
Publication #:	US20060197611	Pub Dt:	09/07/2006
Title:	PHASE-LOCKED LOOP CIRCUITS WITH CURRENT MODE LOOP FILTERS

53

Patent #:	7642892	Issue Dt:	01/05/2010	Application #:	11373374	Filing Dt:	03/10/2006
Title:	NEGATIVE VOLTAGE COEFFICIENT RESISTOR AND METHOD OF MANUFACTURE

54

Patent #:	7378876	Issue Dt:	05/27/2008	Application #:	11374913	Filing Dt:	03/14/2006
Publication #:	US20070216446	Pub Dt:	09/20/2007
Title:	COMPLEMENTARY OUTPUT INVERTER

55

Patent #:	7747904	Issue Dt:	06/29/2010	Application #:	11383121	Filing Dt:	05/12/2006
Title:	ERROR MANAGEMENT SYSTEM AND METHOD FOR A PACKET SWITCH

56

Patent #:	7817652	Issue Dt:	10/19/2010	Application #:	11383150	Filing Dt:	05/12/2006
Title:	SYSTEM AND METHOD OF CONSTRUCTING DATA PACKETS IN A PACKET SWITCH

57

Patent #:	7596142	Issue Dt:	09/29/2009	Application #:	11383165	Filing Dt:	05/12/2006
Title:	PACKET PROCESSING IN A PACKET SWITCH WITH IMPROVED OUTPUT DATA DISTRIBUTION

58

Patent #:	7504899	Issue Dt:	03/17/2009	Application #:	11384605	Filing Dt:	03/20/2006
Publication #:	US20060158267	Pub Dt:	07/20/2006
Title:	INDUCTOR AND CAPACITOR-BASED CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

59

Patent #:	7365614	Issue Dt:	04/29/2008	Application #:	11384758	Filing Dt:	03/20/2006
Publication #:	US20060152293	Pub Dt:	07/13/2006
Title:	INTEGRATED CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

60

Patent #:	7358826	Issue Dt:	04/15/2008	Application #:	11384973	Filing Dt:	03/20/2006
Publication #:	US20060158268	Pub Dt:	07/20/2006
Title:	DISCRETE CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

61

Patent #:	7571267	Issue Dt:	08/04/2009	Application #:	11389748	Filing Dt:	03/27/2006
Title:	CORE CLOCK ALIGNMENT CIRCUITS THAT UTILIZE CLOCK PHASE LEARNING OPERATIONS TO ACHIEVE ACCURATE CLOCKING OF DATA DERIVED FROM SERIAL DATA STREAMS HAVING DIFFERENT RELATIVE SKEWS

62

Patent #:	7298636	Issue Dt:	11/20/2007	Application #:	11393284	Filing Dt:	03/30/2006
Title:	PACKET PROCESSORS HAVING MULTI-FUNCTIONAL RANGE MATCH CELLS THEREIN

63

Patent #:	7825777	Issue Dt:	11/02/2010	Application #:	11393489	Filing Dt:	03/30/2006
Title:	PACKET PROCESSORS HAVING COMPARATORS THEREIN THAT DETERMINE NON-STRICT INEQUALITIES BETWEEN APPLIED OPERANDS

64

Patent #:	7830165	Issue Dt:	11/09/2010	Application #:	11394784	Filing Dt:	03/31/2006
Publication #:	US20070229096	Pub Dt:	10/04/2007
Title:	SYSTEM AND METHOD FOR DETECTING SINGLE EVENT LATCHUP IN INTEGRATED CIRCUITS

65

Patent #:	7414460	Issue Dt:	08/19/2008	Application #:	11395061	Filing Dt:	03/31/2006
Title:	SYSTEM AND METHOD FOR INTEGRATED CIRCUIT CHARGE RECYCLING

66

Patent #:	7644311	Issue Dt:	01/05/2010	Application #:	11395119	Filing Dt:	03/31/2006
Publication #:	US20070234125	Pub Dt:	10/04/2007
Title:	LOGIC SOFT ERROR RATE PREDICTION AND IMPROVEMENT

67

Patent #:	7739424	Issue Dt:	06/15/2010	Application #:	11395570	Filing Dt:	03/31/2006
Publication #:	US20060248376	Pub Dt:	11/02/2006
Title:	PACKET PROCESSING SWITCH AND METHODS OF OPERATION THEREOF

68

Patent #:	7882280	Issue Dt:	02/01/2011	Application #:	11395575	Filing Dt:	03/31/2006
Publication #:	US20060248377	Pub Dt:	11/02/2006
Title:	PACKET PROCESSING SWITCH AND METHODS OF OPERATION THEREOF

69

Patent #:	7375392	Issue Dt:	05/20/2008	Application #:	11395818	Filing Dt:	03/30/2006
Title:	GATE STRUCTURES HAVING SIDEWALL SPACERS FORMED USING SELECTIVE DEPOSITION

70

Patent #:	7286438	Issue Dt:	10/23/2007	Application #:	11403370	Filing Dt:	04/12/2006
Publication #:	US20060227649	Pub Dt:	10/12/2006
Title:	DUAL PORT MEMORY CELL WITH REDUCED COUPLING CAPACITANCE AND SMALL CELL SIZE

71

Patent #:	7684431	Issue Dt:	03/23/2010	Application #:	11407321	Filing Dt:	04/18/2006
Title:	SYSTEM AND METHOD FOR ARBITRATION IN A PACKET SWITCH

72

Patent #:	8120405	Issue Dt:	02/21/2012	Application #:	11419454	Filing Dt:	05/19/2006
Title:	METHOD AND APPARATUS FOR AN OUTPUT BUFFER WITH DYNAMIC IMPEDANCE CONTROL

73

Patent #:	8289989	Issue Dt:	10/16/2012	Application #:	11419572	Filing Dt:	05/22/2006
Title:	SYSTEM AND METHOD FOR ARBITRATION USING AVAILABILITY SIGNALS

74

Patent #:	7782780	Issue Dt:	08/24/2010	Application #:	11420837	Filing Dt:	05/30/2006
Title:	SYSTEM AND METHOD FOR ARBITRATION OF MULTICAST DATA PACKETS USING HOLDS

75

Patent #:	7636367	Issue Dt:	12/22/2009	Application #:	11421330	Filing Dt:	05/31/2006
Title:	METHOD AND APPARATUS FOR OVERBOOKING ON FIFO MEMORY

76

Patent #:	7706387	Issue Dt:	04/27/2010	Application #:	11421415	Filing Dt:	05/31/2006
Title:	SYSTEM AND METHOD FOR ROUND ROBIN ARBITRATION

77

Patent #:	7327814	Issue Dt:	02/05/2008	Application #:	11422252	Filing Dt:	06/05/2006
Title:	AMPLITUDE AND BANDWIDTH PRE-EMPHASIS OF A DATA SIGNAL

78

Patent #:	7714620	Issue Dt:	05/11/2010	Application #:	11422381	Filing Dt:	06/06/2006
Title:	COMPARATOR WITH AMPLITUDE AND TIME HYSTERESIS

79

Patent #:	7582567	Issue Dt:	09/01/2009	Application #:	11424333	Filing Dt:	06/15/2006
Title:	METHOD FOR FORMING CMOS DEVICE WITH SELF-ALIGNED CONTACTS AND REGION FORMED USING SALICIDE PROCESS

80

Patent #:	7405594	Issue Dt:	07/29/2008	Application #:	11424779	Filing Dt:	06/16/2006
Title:	CURRENT MODE DRIVER WITH CONSTANT VOLTAGE SWING

81

Patent #:	7536614	Issue Dt:	05/19/2009	Application #:	11427322	Filing Dt:	06/28/2006
Title:	BUILT-IN-REDUNDANCY ANALYSIS USING RAM

82

Patent #:	8265219	Issue Dt:	09/11/2012	Application #:	11428071	Filing Dt:	06/30/2006
Title:	METHOD AND APPARATUS FOR FAST PLL INITIALIZATION

83

Patent #:	7782151	Issue Dt:	08/24/2010	Application #:	11441262	Filing Dt:	05/25/2006
Publication #:	US20060267693	Pub Dt:	11/30/2006
Title:	VCO DIGITAL RANGE SELECTION

84

Patent #:	7368938	Issue Dt:	05/06/2008	Application #:	11455074	Filing Dt:	06/15/2006
Publication #:	US20070290713	Pub Dt:	12/20/2007
Title:	INPUT TERMINATION CIRCUITRY WITH HIGH IMPEDANCE AT POWER OFF

85

Patent #:	7560800	Issue Dt:	07/14/2009	Application #:	11459820	Filing Dt:	07/25/2006
Title:	DIE SEAL WITH REDUCED NOISE COUPLING

86

Patent #:	7750618	Issue Dt:	07/06/2010	Application #:	11459889	Filing Dt:	07/25/2006
Title:	SYSTEM AND METHOD FOR TESTING A CLOCK CIRCUIT

87

Patent #:	7602318	Issue Dt:	10/13/2009	Application #:	11462973	Filing Dt:	08/07/2006
Title:	METHOD AND APPARATUS FOR IMPROVED EFFICIENCY IN PROTOCOLS USING CHARACTER CODING

88

Patent #:	7555668	Issue Dt:	06/30/2009	Application #:	11488494	Filing Dt:	07/18/2006
Publication #:	US20080022145	Pub Dt:	01/24/2008
Title:	DRAM INTERFACE CIRCUITS THAT SUPPORT FAST DESKEW CALIBRATION AND METHODS OF OPERATING SAME

89

Patent #:	7436224	Issue Dt:	10/14/2008	Application #:	11494847	Filing Dt:	07/27/2006
Publication #:	US20080024176	Pub Dt:	01/31/2008
Title:	LOW VARIATION VOLTAGE OUTPUT DIFFERENTIAL FOR DIFFERENTIAL DRIVERS

90

Patent #:	7774526	Issue Dt:	08/10/2010	Application #:	11521886	Filing Dt:	09/14/2006
Publication #:	US20080071944	Pub Dt:	03/20/2008
Title:	METHOD FOR DETERMINISTIC TIMED TRANSFER OF DATA WITH MEMORY USING A SERIAL INTERFACE

91

Patent #:	7827324	Issue Dt:	11/02/2010	Application #:	11524660	Filing Dt:	09/20/2006
Publication #:	US20080126607	Pub Dt:	05/29/2008
Title:	METHOD OF HANDLING FLOW CONTROL IN DAISY-CHAIN PROTOCOLS

92

Patent #:	7474011	Issue Dt:	01/06/2009	Application #:	11527374	Filing Dt:	09/25/2006
Publication #:	US20080122473	Pub Dt:	05/29/2008
Title:	METHOD FOR IMPROVED SINGLE EVENT LATCH UP RESISTANCE IN AN INTEGRATED CIRCUIT

93

Patent #:	7279938	Issue Dt:	10/09/2007	Application #:	11532657	Filing Dt:	09/18/2006
Title:	DELAY CHAIN INTEGRATED CIRCUITS HAVING BINARY-WEIGHTED DELAY CHAIN UNITS WITH BUILT-IN PHASE COMPARATORS THEREIN

94

Patent #:	7918977	Issue Dt:	04/05/2011	Application #:	11533729	Filing Dt:	09/20/2006
Publication #:	US20070102294	Pub Dt:	05/10/2007
Title:	SOLID STATE ELECTROCHEMICAL GAS SENSOR AND METHOD FOR FABRICATING SAME

95

Patent #:	7329958	Issue Dt:	02/12/2008	Application #:	11536210	Filing Dt:	09/28/2006
Title:	METHOD AND APPARATUS WITH POWER AND GROUND STRIPS FOR CONNECTING TO DECOUPLING CAPACITORS

96

Patent #:	7564268	Issue Dt:	07/21/2009	Application #:	11557320	Filing Dt:	11/07/2006
Publication #:	US20080122487	Pub Dt:	05/29/2008
Title:	LOW POWER LOGIC OUTPUT BUFFER

97

Patent #:	7394414	Issue Dt:	07/01/2008	Application #:	11587105	Filing Dt:	10/19/2006
Publication #:	US20070222653	Pub Dt:	09/27/2007
Title:	ERROR REDUCTION IN A DIGITAL-TO-ANALOG (DAC) CONVERTER

98

Patent #:	7656007	Issue Dt:	02/02/2010	Application #:	11590940	Filing Dt:	11/01/2006
Publication #:	US20080099901	Pub Dt:	05/01/2008
Title:	PACKAGE SUBSTRATE WITH INSERTED DISCRETE CAPACITORS

99

Patent #:	7734002	Issue Dt:	06/08/2010	Application #:	11599895	Filing Dt:	11/14/2006
Publication #:	US20080112526	Pub Dt:	05/15/2008
Title:	PHASE DIFFERENCE DETECTOR HAVING CONCURRENT FINE AND COARSE CAPABILITIES

100

Patent #:	7898288	Issue Dt:	03/01/2011	Application #:	11608234	Filing Dt:	12/07/2006
Publication #:	US20080136443	Pub Dt:	06/12/2008
Title:	INPUT TERMINATION FOR DELAY LOCKED LOOP FEEDBACK WITH IMPEDANCE MATCHING

Assignors

1

INTEGRATED DEVICE TECHNOLOGY, INC.

Exec Dt:

04/04/2017

2

Exec Dt:

04/04/2017

3

MAGNUM SEMICONDUCTOR, INC.

Exec Dt:

04/04/2017

4

ENDWAVE CORPORATION

Exec Dt:

04/04/2017

5

CHIPX, INCORPORATED

Exec Dt:

04/04/2017

Assignee

1

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

MAIL CODE NY1-C413, 4 CMC

BROOKLYN, NEW YORK 11245-0001

Correspondence name and address
	CT CORPORATION SYSTEM
	4400 EASTON COMMONS WAY
	SUITE 125
	COLUMBUS, OH 43219

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