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Total properties:
13
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Patent #:
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Issue Dt:
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04/16/1991
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Application #:
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07283340
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Filing Dt:
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12/12/1988
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Title:
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SELECTIVE ASPERITY DEFINITION TECHNIQUE SUITABLE FOR USE IN FABRICATING FLOATING-GATE TRANSISTOR
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Patent #:
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Issue Dt:
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09/03/1991
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Application #:
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07524329
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Filing Dt:
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05/16/1990
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Title:
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LOW POWER PROGRAMMING CIRCUIT FOR USER PROGRAMMABLE DIGITAL LOGIC ARRAY
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Patent #:
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Issue Dt:
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08/13/1991
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Application #:
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07525288
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Filing Dt:
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05/17/1990
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Title:
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HIGH VOLTAGE MOS TRANSISTOR HAVING SHIELDED CROSSOVER PATH FOR A HIGH VOLTAGE CONNECTION BUS
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Patent #:
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Issue Dt:
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05/12/1992
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Application #:
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07628307
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Filing Dt:
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12/14/1990
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Title:
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INTEGRATED CIRCUIT DEVICE PARTICULARLY ADAPTED FOR HIGH VOLTAGE APPLICATIONS
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Patent #:
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Issue Dt:
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01/11/1994
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Application #:
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07810250
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Filing Dt:
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12/19/1991
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Title:
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ELECTRICALLY ERASABLE AND PROGRAMMABLE READ-ONLY MEMORY WITH SOURCE AND DRAIN REGIONS ALONG SIDEWALLS OF A TRENCH STRUCTURE
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Patent #:
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Issue Dt:
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05/25/1993
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Application #:
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07867729
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Filing Dt:
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04/10/1992
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Title:
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PROCESS FOR MAKING THIN FILM SILICON-ON-INSULATOR WAFERS EMPLOYING WAFER BONDING AND WAFER THINNING
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Patent #:
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Issue Dt:
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08/31/1993
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Application #:
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07929086
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Filing Dt:
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08/12/1992
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Title:
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SELECTIVE OXIDATION OF SILICON TRENCH SIDEWALL
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Patent #:
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Issue Dt:
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05/10/1994
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Application #:
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08036774
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Filing Dt:
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03/25/1993
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Title:
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COMBINATION DRIVER-SUMMING CIRCUIT FOR RAIL-TO-RAIL DIFFERENTIAL AMPLIFIER
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Patent #:
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Issue Dt:
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12/31/1996
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Application #:
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08308337
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Filing Dt:
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09/16/1994
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Title:
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PROCESSOR WITH WORD-ALIGNED BRANCH TARGET IN A BYTE-ORIENTED INSTRUCTION SET
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Patent #:
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Issue Dt:
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11/11/1997
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Application #:
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08345167
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Filing Dt:
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11/28/1994
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Title:
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PRE-REGULATOR WITH LIGHT SWITCH TO LIMIT VOLTAGE RINGING ON TURN-OFF
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Patent #:
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Issue Dt:
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10/08/1996
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Application #:
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08426512
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Filing Dt:
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04/21/1995
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Title:
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METHOD OF FABRICATING NON-VOLATILE SIDEWALL MEMORY CELL
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Patent #:
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Issue Dt:
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11/11/1997
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Application #:
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08453412
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Filing Dt:
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05/30/1995
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Title:
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LOW NOISE CONTROLLER FOR PULSE WIDTH MODULATED CONVERTERS
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08705072
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Filing Dt:
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08/29/1996
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Title:
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CMOS PROCESS UTILIZING DISPOSABLE SILICON NITRIDE SPACERS FOR MAKING LIGHTLY DOPED DRAIN
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