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Patent Assignment Details
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Reel/Frame:019265/0434   Pages: 10
Recorded: 05/09/2007
Attorney Dkt #:116953
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 25
1
Patent #:
5835932
Issue Dt:
11/10/1998
Application #:
08816663
Filing Dt:
03/13/1997
Title:
METHODS AND SYSTEMS FOR MAINTAINING DATA LOCALITY IN A MULTIPLE MEMORY BANK SYSTEM HAVING DRAM WITH INTEGRAL SRAM
2
Patent #:
5890195
Issue Dt:
03/30/1999
Application #:
08855944
Filing Dt:
05/14/1997
Title:
DRAM WITH INTEGRAL SRAM COMPRISING A PLURALITY OF SETS OF ADDRESS LATCHES EACH ASSOCIATED WITH ONE OF A PLURALITY OF SRAM
3
Patent #:
5953738
Issue Dt:
09/14/1999
Application #:
08886952
Filing Dt:
07/02/1997
Title:
DRAM WITH INTEGRAL SRAM AND ARITHMETIC-LOGIC UNITS
4
Patent #:
5856940
Issue Dt:
01/05/1999
Application #:
08911737
Filing Dt:
08/15/1997
Title:
LOW LATENCY DRAM CELL AND METHOD THEREFOR
5
Patent #:
6222216
Issue Dt:
04/24/2001
Application #:
08955045
Filing Dt:
10/21/1997
Title:
NON-VOLATILE AND MEMEORY FABRICATED USING A DYNAMIC MEMORY PROCESS AND METHOD THEREFOR
6
Patent #:
5991191
Issue Dt:
11/23/1999
Application #:
08985943
Filing Dt:
12/05/1997
Title:
METHODS AND CIRCUITS FOR SNGLE-MEMORY CELL MULTIVALUE DATA STORAGE
7
Patent #:
5940329
Issue Dt:
08/17/1999
Application #:
08992416
Filing Dt:
12/17/1997
Title:
MEMORY ARCHITECTURE AND SYSTEMS AND METHODS USING THE SAME
8
Patent #:
5963468
Issue Dt:
10/05/1999
Application #:
09016559
Filing Dt:
01/30/1998
Title:
LOW LATENCY MEMORIES AND SYSTEMS USING THE SAME
9
Patent #:
6173356
Issue Dt:
01/09/2001
Application #:
09026927
Filing Dt:
02/20/1998
Title:
MULTI-PORT DRAM WITH INTEGRATED SRAM AND SYSTEMS AND METHODS USING THE SAME
10
Patent #:
5995409
Issue Dt:
11/30/1999
Application #:
09045259
Filing Dt:
03/20/1998
Title:
ELECTRICALLY-PROGRAMMABLE READ-ONLY MEMORY FABRICATED USING A DYNAMIC RANDOM ACCESS MEMORY FABRICATION PROCESS AND METHODS FOR PROGRAMMING SAME
11
Patent #:
5963497
Issue Dt:
10/05/1999
Application #:
09080813
Filing Dt:
05/18/1998
Title:
DYNAMIC RANDOM ACESS MEMORY SYSTEM WITH SIMULTANEOUS ACCESS AND REFRESH OPERATIONS AND METHODS FOR USING THE SAME
12
Patent #:
6005799
Issue Dt:
12/21/1999
Application #:
09130136
Filing Dt:
08/06/1998
Title:
METHODS AND CIRCUITS FOR SINGLE-MEMORY DYNAMIC CELL MULTIVALUE DATA STORAGE
13
Patent #:
6256256
Issue Dt:
07/03/2001
Application #:
09141490
Filing Dt:
08/28/1998
Title:
DUAL PORT RANDOM ACCESS MEMORIES AND SYSTEMS USING THE SAME
14
Patent #:
6282606
Issue Dt:
08/28/2001
Application #:
09285869
Filing Dt:
04/02/1999
Title:
DYNAMIC RANDOM ACCESS MEMORIES WITH HIDDEN REFRESH AND UTILIZING ONE-TRANSISTOR, ONE-CAPACITOR CELLS, SYSTEMS AND METHODS
15
Patent #:
6233193
Issue Dt:
05/15/2001
Application #:
09295641
Filing Dt:
04/20/1999
Title:
DYNAMIC RANDOM ACCESS MEMORY SYSTEM WITH A STATIC RANDOM ACCESS MEMORY INTERFACE AND METHODS FOR USING THE SAME
16
Patent #:
6222786
Issue Dt:
04/24/2001
Application #:
09432307
Filing Dt:
11/02/1999
Title:
DYNAMIC RANDOM ACCESS MEMORY WITH WRITE-WITHOUT-RESTORE AND SYSTEMS AND METHODS USING THE SAME
17
Patent #:
6256221
Issue Dt:
07/03/2001
Application #:
09507106
Filing Dt:
02/17/2000
Title:
Arrays of two-transistor, one-capacitor dynamic random access memory cells with interdigitated bitlines
18
Patent #:
6310880
Issue Dt:
10/30/2001
Application #:
09527351
Filing Dt:
03/17/2000
Title:
Content addressable memory cells and systems and devices using the same
19
Patent #:
6504785
Issue Dt:
01/07/2003
Application #:
09542955
Filing Dt:
07/27/2000
Title:
MULTIPROCESSOR SYSTEM WITH INTEGRATED MEMORY
20
Patent #:
6418063
Issue Dt:
07/09/2002
Application #:
09543241
Filing Dt:
05/14/1999
Title:
MEMORY ARCHITECTURE AND SYSTEMS AND METHODS USING THE SAME
21
Patent #:
6396764
Issue Dt:
05/28/2002
Application #:
09715669
Filing Dt:
11/16/2000
Title:
SEGMENTED MEMORY ARCHITECTURE AND SYSTEMS AND METHODS USING THE SAME
22
Patent #:
6597594
Issue Dt:
07/22/2003
Application #:
09832391
Filing Dt:
04/10/2001
Publication #:
US20010033508
Pub Dt:
10/25/2001
Title:
CONTENT ADDRESSABLE MEMORY CELLS AND SYSTEMS AND DEVICES USING THE SAME
23
Patent #:
7707330
Issue Dt:
04/27/2010
Application #:
10665906
Filing Dt:
09/18/2003
Publication #:
US20050066133
Pub Dt:
03/24/2005
Title:
MEMORIES FOR ELECTRONIC SYSTEMS
24
Patent #:
7139213
Issue Dt:
11/21/2006
Application #:
10844002
Filing Dt:
05/12/2004
Publication #:
US20040240301
Pub Dt:
12/02/2004
Title:
MULTIPLE DATA PATH MEMORIES AND SYSTEMS
25
Patent #:
7254690
Issue Dt:
08/07/2007
Application #:
10850719
Filing Dt:
05/20/2004
Publication #:
US20040243781
Pub Dt:
12/02/2004
Title:
PIPELINED SEMICONDUCTOR MEMORIES AND SYSTEMS
Assignor
1
SILICON AQUARIUS, INCORPORATED
Exec Dt:
04/23/2007
Assignee
1
S. AQUA SEMICONDUCTOR
2711 CENTERVILLE ROAD
SUITE 400
WILMINGTON, DELAWARE 19808
Correspondence name and address
SCHWABE, WILLIAMSON & WYATT, P.C.
1211 SW FIFTH AVENUE, SUITE 1900
PORTLAND, OR 97204

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