Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 049491/0435 | |
| Pages: | 3 |
| | Recorded: | 06/17/2019 | | |
| Attorney Dkt #: | 44016239US01 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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09/21/2021
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Application #:
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16265192
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Filing Dt:
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02/01/2019
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Publication #:
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Pub Dt:
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08/06/2020
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Title:
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VERTICAL TRANSISTOR FABRICATION FOR MEMORY APPLICATIONS
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Assignee
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| 3050 BOWERS AVENUE |
| SANTA CLARA, CALIFORNIA 95054 |
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Correspondence name and address
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PATTERSON + SHERIDAN, LLP
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595 SHREWSBURY AVE
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SUITE 100
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SHREWSBURY, NJ 07702
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