Total properties:
50
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Patent #:
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Issue Dt:
|
05/10/2005
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Application #:
|
09759624
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Filing Dt:
|
01/12/2001
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Publication #:
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Pub Dt:
|
10/18/2001
| | | | |
Title:
|
BAUD-RATE TIMING RECOVERY
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Patent #:
|
|
Issue Dt:
|
11/01/2005
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Application #:
|
09922990
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Filing Dt:
|
08/03/2001
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Publication #:
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Pub Dt:
|
04/25/2002
| | | | |
Title:
|
DIGITAL DISPLAY JITTER CORRECTION APPARATUS AND METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
09989580
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Filing Dt:
|
11/20/2001
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Title:
|
BIDIRECTIONAL BRIDGE CIRCUIT HAVING HIGH COMMON MODE REJECTION AND HIGH INPUT SENSITIVITY
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|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
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Application #:
|
09989587
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Filing Dt:
|
11/20/2001
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Title:
|
MULTI-PHASE VOLTAGE CONTROLLED OSCILLATOR (VCO) WITH COMMON MODE CONTROL
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|
Patent #:
|
|
Issue Dt:
|
10/26/2004
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Application #:
|
09989645
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Filing Dt:
|
11/20/2001
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Title:
|
SYSTEM AND METHOD FOR MULTIPLE-PHASE CLOCK GENERATION
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|
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Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
09989647
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Filing Dt:
|
11/20/2001
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Title:
|
LOGIC GATES INCLUDING DIODE-CONNECTED METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS (MOSFETS) TO CONTROL INPUT THRESHOLD VOLTAGE LEVELS AND SWITCHING TRANSIENTS OF OUTPUT LOGIC SIGNALS
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10035591
|
Filing Dt:
|
11/07/2001
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Publication #:
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Pub Dt:
|
10/24/2002
| | | | |
Title:
|
Communications architecture for storage-based devices
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Patent #:
|
|
Issue Dt:
|
12/26/2006
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Application #:
|
10035911
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Filing Dt:
|
11/07/2001
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Publication #:
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Pub Dt:
|
01/08/2004
| | | | |
Title:
|
METHOD AND SYSTEM FOR NESTING OF COMMUNICATIONS PACKETS
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10036135
|
Filing Dt:
|
11/07/2001
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Publication #:
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|
Pub Dt:
|
11/14/2002
| | | | |
Title:
|
Method and system for packet ordering based on packet type
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|
|
Patent #:
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|
Issue Dt:
|
12/13/2005
|
Application #:
|
10036794
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Filing Dt:
|
11/07/2001
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Publication #:
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|
Pub Dt:
|
10/24/2002
| | | | |
Title:
|
METHOD AND SYSTEM FOR HOST HANDLING OF COMMUNICATIONS ERRORS
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10037168
|
Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
Title:
|
Method and system for plesiosynchronous communications with null insertion and removal
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|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10045297
|
Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
MEMORY ARCHITECTURE WITH MULTIPLE SERIAL COMMUNICATIONS PORTS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10045348
|
Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
Title:
|
Method and system for asymmetric packet ordering between communications devices
|
|
|
Patent #:
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|
Issue Dt:
|
05/02/2006
|
Application #:
|
10045393
|
Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR TRANSITION-CONTROLLED SELECTIVE BLOCK INVERSION COMMUNICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10045600
|
Filing Dt:
|
11/07/2001
|
Title:
|
METHOD AND SYSTEM FOR DC-BALANCING AT THE PHYSICAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
10045601
|
Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
11/06/2003
| | | | |
Title:
|
MULTISECTION MEMORY BANK SYSTEM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10045606
|
Filing Dt:
|
11/07/2001
|
Publication #:
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|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
Method and system for dynamic segmentation of communications packets
|
|
|
Patent #:
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|
Issue Dt:
|
06/29/2010
|
Application #:
|
10045625
|
Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
Title:
|
METHOD AND SYSTEM FOR INTEGRATING PACKET TYPE INFORMATION WITH SYNCHRONIZATION SYMBOLS
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|
|
Patent #:
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|
Issue Dt:
|
09/26/2006
|
Application #:
|
10053461
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Filing Dt:
|
11/07/2001
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR COMMUNICATING CONTROL INFORMATION VIA OUT-OF-BAND SYMBOLS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
10371220
|
Filing Dt:
|
02/19/2003
|
Publication #:
|
|
Pub Dt:
|
08/19/2004
| | | | |
Title:
|
DATA SYNCHRONIZATION ACROSS AN ASYNCHRONOUS BOUNDARY USING, FOR EXAMPLE, MULTI-PHASE CLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10459989
|
Filing Dt:
|
06/12/2003
|
Title:
|
METHOD AND SYSTEM FOR ENCAPSULATION OF MULTIPLE LEVELS OF COMMUNICATION PROTOCOL FUNCTIONALITY WITHIN LINE CODES
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|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
10781405
|
Filing Dt:
|
02/18/2004
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Publication #:
|
|
Pub Dt:
|
08/18/2005
| | | | |
Title:
|
CABLE WITH CIRCUITRY FOR ASSERTING STORED CABLE DATA OR OTHER INFORMATION TO AN EXTERNAL DEVICE OR USER
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|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11219323
|
Filing Dt:
|
09/01/2005
|
Publication #:
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|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
DIGITAL DISPLAY JITTER CORRECTION APPARATUS AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11441669
|
Filing Dt:
|
05/25/2006
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
BI-DIRECTIONAL BRIDGE CIRCUIT HAVING HIGH COMMON MODE REJECTION AND HIGH INPUT SENSITIVITY
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|
|
Patent #:
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|
Issue Dt:
|
03/08/2011
|
Application #:
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11828286
|
Filing Dt:
|
07/25/2007
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
Title:
|
COMMUNICATIONS ARCHITECTURE FOR TRANSMISSION OF DATA BETWEEN MEMORY BANK CACHES AND PORTS
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|
Patent #:
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Issue Dt:
|
03/03/2009
|
Application #:
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11848758
|
Filing Dt:
|
08/31/2007
|
Publication #:
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|
Pub Dt:
|
01/24/2008
| | | | |
Title:
|
CABLE WITH CIRCUITRY FOR ASSERTING STORED CABLE DATA OR OTHER INFORMATION TO AN EXTERNAL DEVICE OR USER
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|
Patent #:
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|
Issue Dt:
|
12/21/2010
|
Application #:
|
11969852
|
Filing Dt:
|
01/04/2008
|
Publication #:
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|
Pub Dt:
|
07/09/2009
| | | | |
Title:
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CONTROL BUS FOR CONNECTION OF ELECTRONIC DEVICES
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Patent #:
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|
Issue Dt:
|
04/05/2011
|
Application #:
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11969865
|
Filing Dt:
|
01/04/2008
|
Publication #:
|
|
Pub Dt:
|
07/09/2009
| | | | |
Title:
|
DISCOVERY OF ELECTRONIC DEVICES UTILIZING A CONTROL BUS
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|
Patent #:
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|
Issue Dt:
|
02/14/2012
|
Application #:
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12573847
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Filing Dt:
|
10/05/2009
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Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
BI-DIRECTIONAL BRIDGE CIRCUIT HAVING HIGH COMMON MODE REJECTION AND HIGH INPUT SENSITIVITY
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|
Patent #:
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Issue Dt:
|
09/25/2012
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Application #:
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12577707
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Filing Dt:
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10/12/2009
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Publication #:
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Pub Dt:
|
04/22/2010
| | | | |
Title:
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DISCOVERY OF CONNECTIONS UTILIZING A CONTROL BUS
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Patent #:
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Issue Dt:
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03/25/2014
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Application #:
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12636063
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Filing Dt:
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12/11/2009
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Publication #:
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|
Pub Dt:
|
11/11/2010
| | | | |
Title:
|
POWER DELIVERY OVER DIGITAL INTERACTION INTERFACE FOR VIDEO AND AUDIO (DIIVA)
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Patent #:
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Issue Dt:
|
01/12/2016
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Application #:
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13021958
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Filing Dt:
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02/07/2011
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Publication #:
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|
Pub Dt:
|
08/11/2011
| | | | |
Title:
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DETERMINATION OF PHYSICAL CONNECTIVITY STATUS OF DEVICES BASED ON ELECTRICAL MEASUREMENT
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13172742
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Filing Dt:
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06/29/2011
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Publication #:
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Pub Dt:
|
01/05/2012
| | | | |
Title:
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DETECTION OF CABLE CONNECTIONS FOR ELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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07/09/2013
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Application #:
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13172745
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Filing Dt:
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06/29/2011
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Publication #:
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Pub Dt:
|
01/05/2012
| | | | |
Title:
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DETECTION OF CABLE CONNECTIONS FOR ELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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01/05/2016
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Application #:
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13434273
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Filing Dt:
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03/29/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
Title:
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METHOD, APPARATUS AND SYSTEM FOR TRANSITIONING AN AUDIO/VIDEO DEVICE BETWEEN A SOURCE MODE AND A SINK MODE
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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13521739
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Filing Dt:
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02/20/2013
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Publication #:
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Pub Dt:
|
07/25/2013
| | | | |
Title:
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MULTI-MEDIA USB DATA TRANSFER OVER DIGITAL INTERACTION INTERFACE FOR VIDEO AND AUDIO (DiiVA)
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Patent #:
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Issue Dt:
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07/19/2016
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Application #:
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13521762
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Filing Dt:
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02/14/2013
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Publication #:
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Pub Dt:
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07/25/2013
| | | | |
Title:
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VIDEO MANAGEMENT AND CONTROL IN HOME MULTIMEDIA NETWORK
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Patent #:
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Issue Dt:
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09/09/2014
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Application #:
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13736765
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Filing Dt:
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01/08/2013
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Publication #:
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Pub Dt:
|
07/10/2014
| | | | |
Title:
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MECHANISM FOR FACILITATING DYNAMIC TIMESTAMP-LESS CLOCK GENERATION FOR TRANSMITTING MEDIA STREAMS OVER SHARED CHANNELS
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Patent #:
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Issue Dt:
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12/30/2014
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Application #:
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13779372
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Filing Dt:
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02/27/2013
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Publication #:
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Pub Dt:
|
08/28/2014
| | | | |
Title:
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INTEGRATED CONNECTOR/FLEX CABLE
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Patent #:
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Issue Dt:
|
08/02/2016
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Application #:
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14128551
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Filing Dt:
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12/20/2013
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Publication #:
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|
Pub Dt:
|
01/07/2016
| | | | |
Title:
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DRIVING DATA OF MULTIPLE PROTOCOLS THROUGH A SINGLE SET OF PINS
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Patent #:
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Issue Dt:
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06/20/2017
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Application #:
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14181446
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Filing Dt:
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02/14/2014
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Publication #:
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Pub Dt:
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06/12/2014
| | | | |
Title:
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Power Delivery Over Digital Interaction Interface for Video and Audio (DiiVA)
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Patent #:
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Issue Dt:
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03/01/2016
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Application #:
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14322753
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Filing Dt:
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07/02/2014
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Publication #:
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Pub Dt:
|
01/22/2015
| | | | |
Title:
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Cable with Circuitry for Communicating Performance Information
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Patent #:
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Issue Dt:
|
06/14/2016
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Application #:
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14559523
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Filing Dt:
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12/03/2014
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Publication #:
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|
Pub Dt:
|
03/26/2015
| | | | |
Title:
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DETERMINATION OF PHYSICAL CONNECTIVITY STATUS OF DEVICES BASED ON ELECTRICAL MEASUREMENT
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|
Patent #:
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|
Issue Dt:
|
11/29/2016
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Application #:
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14610855
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Filing Dt:
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01/30/2015
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Publication #:
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Pub Dt:
|
10/15/2015
| | | | |
Title:
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Efficient Routing of Streams Encrypted Using Point-to-Point Authentication Protocol
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|
|
Patent #:
|
|
Issue Dt:
|
11/13/2018
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Application #:
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14617755
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Filing Dt:
|
02/09/2015
|
Publication #:
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Pub Dt:
|
11/12/2015
| | | | |
Title:
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Media Stream Data and Control Parameter Synchronization
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Patent #:
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Issue Dt:
|
07/11/2017
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Application #:
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14677806
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Filing Dt:
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04/02/2015
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Publication #:
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Pub Dt:
|
10/08/2015
| | | | |
Title:
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DETECTING THE ORIENTATION OF A MULTIMEDIA LINK CONNECTED TO A DEVICE
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Patent #:
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Issue Dt:
|
12/26/2017
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Application #:
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14681992
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Filing Dt:
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04/08/2015
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Publication #:
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Pub Dt:
|
10/15/2015
| | | | |
Title:
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Bidirectional Transmission Of USB Data Using Audio/Video Data Channel
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|
|
Patent #:
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|
Issue Dt:
|
10/18/2016
|
Application #:
|
14824717
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Filing Dt:
|
08/12/2015
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Title:
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REVERSIBLE RECEPTACLE CONNECTOR
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|
Patent #:
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Issue Dt:
|
10/18/2016
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Application #:
|
15010166
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Filing Dt:
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01/29/2016
|
Publication #:
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Pub Dt:
|
05/26/2016
| | | | |
Title:
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CABLE WITH CIRCUITRY FOR COMMUNICATING PERFORMANCE INFORMATION
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Patent #:
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Issue Dt:
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07/24/2018
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Application #:
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15224286
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Filing Dt:
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07/29/2016
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Publication #:
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|
Pub Dt:
|
01/05/2017
| | | | |
Title:
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Driving Data of Multiple Protocols Through a Single Set Of Pins
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|