skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:065017/0449   Pages: 18
Recorded: 09/22/2023
Attorney Dkt #:120719.00001
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 77
1
Patent #:
Issue Dt:
04/10/2007
Application #:
11129996
Filing Dt:
05/16/2005
Publication #:
Pub Dt:
11/17/2005
Title:
DUTY-CYCLE CORRECTION CIRCUIT
2
Patent #:
Issue Dt:
04/29/2008
Application #:
11239200
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
07/27/2006
Title:
SYSTEM AND METHOD FOR JITTER CONTROL
3
Patent #:
Issue Dt:
02/03/2009
Application #:
11461445
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
02/01/2007
Title:
METHOD AND APPARATUS FOR GENERATING UNIQUE IDENTIFICATION NUMBERS FOR PCI EXPRESS TRANSACTIONS WITH SUBSTANTIALLY INCREASED PERFORMANCE
4
Patent #:
Issue Dt:
11/11/2008
Application #:
11732901
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
10/25/2007
Title:
SWITCHED-CAPACITOR RESET ARCHITECTURE FOR OPAMP
5
Patent #:
Issue Dt:
05/01/2012
Application #:
11998695
Filing Dt:
11/30/2007
Publication #:
Pub Dt:
06/05/2008
Title:
SERIALIZER DESERIALIZER CIRCUITS
6
Patent #:
Issue Dt:
11/04/2014
Application #:
13231300
Filing Dt:
09/13/2011
Publication #:
Pub Dt:
08/09/2012
Title:
DECISION FEEDBACK EQUALIZER AND TRANSCEIVER
7
Patent #:
Issue Dt:
11/04/2014
Application #:
13658980
Filing Dt:
10/24/2012
Title:
HIGH-SPEED SST TRANSMIT DRIVER
8
Patent #:
Issue Dt:
07/25/2017
Application #:
14871719
Filing Dt:
09/30/2015
Publication #:
Pub Dt:
03/30/2017
Title:
DESERIALIZED DUAL-LOOP CLOCK RADIO AND DATA RECOVERY CIRCUIT
9
Patent #:
Issue Dt:
02/19/2019
Application #:
15629453
Filing Dt:
06/21/2017
Publication #:
Pub Dt:
11/30/2017
Title:
Deserialized Dual-Loop Clock Radio and Data Recovery Circuit
10
Patent #:
Issue Dt:
06/18/2019
Application #:
15945235
Filing Dt:
04/04/2018
Title:
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
11
Patent #:
Issue Dt:
11/23/2021
Application #:
15945523
Filing Dt:
04/04/2018
Title:
HIGH-RESOLUTION DIGITALLY CONTROLLED DELAY LINE
12
Patent #:
Issue Dt:
03/17/2020
Application #:
16418204
Filing Dt:
05/21/2019
Title:
SKEW-TOLERANT TIMING SIGNAL GATING
13
Patent #:
Issue Dt:
11/17/2020
Application #:
16441692
Filing Dt:
06/14/2019
Publication #:
Pub Dt:
12/26/2019
Title:
PAM-4 CALIBRATION
14
Patent #:
Issue Dt:
12/01/2020
Application #:
16441742
Filing Dt:
06/14/2019
Publication #:
Pub Dt:
01/02/2020
Title:
PHASE ROTATOR NON-LINEARITY REDUCTION
15
Patent #:
Issue Dt:
04/28/2020
Application #:
16455479
Filing Dt:
06/27/2019
Publication #:
Pub Dt:
01/02/2020
Title:
Symbol-Rate Phase Detector for Multi-PAM Receiver
16
Patent #:
Issue Dt:
01/12/2021
Application #:
16611472
Filing Dt:
11/06/2019
Publication #:
Pub Dt:
05/07/2020
Title:
RECEIVER/TRANSMITTER CO-CALIBRATION OF VOLTAGE LEVELS IN PULSE AMPLITUDE MODULATION LINKS
17
Patent #:
Issue Dt:
10/31/2023
Application #:
16674569
Filing Dt:
11/05/2019
Publication #:
Pub Dt:
05/07/2020
Title:
PHASE-LOCKED LOOP WITH PHASE INFORMATION MULTIPLICATION
18
Patent #:
Issue Dt:
03/22/2022
Application #:
16721116
Filing Dt:
12/19/2019
Publication #:
Pub Dt:
06/25/2020
Title:
ADJUSTMENT OF MULTI-PHASE CLOCK SYSTEM
19
Patent #:
Issue Dt:
01/12/2021
Application #:
16800215
Filing Dt:
02/25/2020
Title:
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
20
Patent #:
Issue Dt:
10/05/2021
Application #:
16810200
Filing Dt:
03/05/2020
Publication #:
Pub Dt:
09/10/2020
Title:
TRANSMIT DRIVER ARCHITECTURE
21
Patent #:
Issue Dt:
01/05/2021
Application #:
16817171
Filing Dt:
03/12/2020
Publication #:
Pub Dt:
09/17/2020
Title:
EDGE ENHANCEMENT FOR SIGNAL TRANSMITTER
22
Patent #:
Issue Dt:
06/15/2021
Application #:
16847793
Filing Dt:
04/14/2020
Publication #:
Pub Dt:
10/01/2020
Title:
Symbol-Rate Phase Detector for Multi-PAM Receiver
23
Patent #:
Issue Dt:
09/20/2022
Application #:
16934008
Filing Dt:
07/21/2020
Title:
FRAGMENTED PERIODIC TIMING CALIBRATION
24
Patent #:
Issue Dt:
11/28/2023
Application #:
16940679
Filing Dt:
07/28/2020
Title:
HIGH-BANDWIDTH SIGNAL DRIVER/RECEIVER
25
Patent #:
Issue Dt:
07/19/2022
Application #:
16973142
Filing Dt:
12/08/2020
Publication #:
Pub Dt:
08/12/2021
Title:
SERIALIZING AND DESERIALIZING STAGE TESTING
26
Patent #:
Issue Dt:
09/28/2021
Application #:
17026133
Filing Dt:
09/18/2020
Publication #:
Pub Dt:
03/25/2021
Title:
RECEIVER TRAINING OF REFERENCE VOLTAGE AND EQUALIZER COEFFICIENTS
27
Patent #:
Issue Dt:
09/21/2021
Application #:
17045769
Filing Dt:
10/07/2020
Publication #:
Pub Dt:
02/25/2021
Title:
Serial-Link Receiver Using Time-Interleaved Discrete Time Gain
28
Patent #:
Issue Dt:
03/21/2023
Application #:
17051304
Filing Dt:
10/28/2020
Publication #:
Pub Dt:
08/05/2021
Title:
EFFICIENT STORAGE OF ERROR CORRECTING CODE INFORMATION
29
Patent #:
Issue Dt:
07/26/2022
Application #:
17059406
Filing Dt:
11/27/2020
Publication #:
Pub Dt:
07/08/2021
Title:
Methods and Circuits for Decision-Feedback Equalization Using Compensated Decision Regions
30
Patent #:
Issue Dt:
12/07/2021
Application #:
17068483
Filing Dt:
10/12/2020
Publication #:
Pub Dt:
03/25/2021
Title:
PAM-4 CALIBRATION
31
Patent #:
Issue Dt:
12/21/2021
Application #:
17082467
Filing Dt:
10/28/2020
Publication #:
Pub Dt:
04/08/2021
Title:
PHASE ROTATOR NON-LINEARITY REDUCTION
32
Patent #:
Issue Dt:
03/07/2023
Application #:
17106641
Filing Dt:
11/30/2020
Publication #:
Pub Dt:
06/17/2021
Title:
PATTERN DETECTION BASED PARAMETER ADAPTATION
33
Patent #:
Issue Dt:
05/03/2022
Application #:
17116460
Filing Dt:
12/09/2020
Publication #:
Pub Dt:
05/13/2021
Title:
RECEIVER/TRANSMITTER CO-CALIBRATION OF VOLTAGE LEVELS IN PULSE AMPLITUDE MODULATION LINKS
34
Patent #:
Issue Dt:
07/12/2022
Application #:
17117411
Filing Dt:
12/10/2020
Title:
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
35
Patent #:
Issue Dt:
10/18/2022
Application #:
17153157
Filing Dt:
01/20/2021
Publication #:
Pub Dt:
07/29/2021
Title:
DUAL LOOP SAR ADC WITH PROCESS DRIVEN ARCHITECTURE
36
Patent #:
Issue Dt:
02/01/2022
Application #:
17166919
Filing Dt:
02/03/2021
Publication #:
Pub Dt:
08/12/2021
Title:
LOW-NOISE DIFFERENTIAL-OUTPUT CAPACITOR DAC
37
Patent #:
Issue Dt:
02/22/2022
Application #:
17181883
Filing Dt:
02/22/2021
Publication #:
Pub Dt:
09/09/2021
Title:
CTLE ADAPTATION BASED ON STATISTICAL ANALYSIS
38
Patent #:
Issue Dt:
07/19/2022
Application #:
17247932
Filing Dt:
12/30/2020
Publication #:
Pub Dt:
07/01/2021
Title:
EDGE ENHANCEMENT FOR SIGNAL TRANSMITTER
39
Patent #:
Issue Dt:
08/02/2022
Application #:
17252799
Filing Dt:
12/16/2020
Publication #:
Pub Dt:
08/12/2021
Title:
Methods and Circuits for Decision-Feedback Equalization with Early High-Order-Symbol Detection
40
Patent #:
Issue Dt:
05/24/2022
Application #:
17262901
Filing Dt:
01/25/2021
Publication #:
Pub Dt:
06/03/2021
Title:
OFFSET CALIBRATION FOR SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER
41
Patent #:
Issue Dt:
11/15/2022
Application #:
17265294
Filing Dt:
02/02/2021
Publication #:
Pub Dt:
09/30/2021
Title:
Multi-Stage Equalizer for Inter-Symbol Interference Cancellation
42
Patent #:
Issue Dt:
03/19/2024
Application #:
17270223
Filing Dt:
02/22/2021
Publication #:
Pub Dt:
09/30/2021
Title:
Direct-Switching H-Bridge Current-Mode Drivers
43
Patent #:
Issue Dt:
03/08/2022
Application #:
17273874
Filing Dt:
03/05/2021
Publication #:
Pub Dt:
10/28/2021
Title:
CIRCUIT AND METHOD TO SET DELAY BETWEEN TWO PERIODIC SIGNALS WITH UNKNOWN PHASE RELATIONSHIP
44
Patent #:
Issue Dt:
06/06/2023
Application #:
17298165
Filing Dt:
05/28/2021
Publication #:
Pub Dt:
04/14/2022
Title:
LIVE OFFSET CANCELLATION OF THE DECISION FEEDBACK EQUALIZATION DATA SLICERS
45
Patent #:
Issue Dt:
06/20/2023
Application #:
17323271
Filing Dt:
05/18/2021
Publication #:
Pub Dt:
11/04/2021
Title:
Symbol-Rate Phase Detector for Multi-PAM Receiver
46
Patent #:
Issue Dt:
01/31/2023
Application #:
17333380
Filing Dt:
05/28/2021
Publication #:
Pub Dt:
12/09/2021
Title:
BAUD-RATE CLOCK RECOVERY LOCK POINT CONTROL
47
Patent #:
NONE
Issue Dt:
Application #:
17393827
Filing Dt:
08/04/2021
Publication #:
Pub Dt:
02/17/2022
Title:
MEMORY INTERFACE TRAINING
48
Patent #:
Issue Dt:
11/07/2023
Application #:
17460701
Filing Dt:
08/30/2021
Publication #:
Pub Dt:
02/17/2022
Title:
RECEIVER TRAINING OF REFERENCE VOLTAGE AND EQUALIZER COEFFICIENTS
49
Patent #:
Issue Dt:
07/18/2023
Application #:
17460774
Filing Dt:
08/30/2021
Publication #:
Pub Dt:
02/10/2022
Title:
Serial-Link Receiver Using Time-Interleaved Discrete Time Gain
50
Patent #:
Issue Dt:
12/27/2022
Application #:
17461008
Filing Dt:
08/30/2021
Publication #:
Pub Dt:
03/10/2022
Title:
MATCHED DIGITAL-TO-ANALOG CONVERTERS
51
Patent #:
Issue Dt:
08/15/2023
Application #:
17463897
Filing Dt:
09/01/2021
Publication #:
Pub Dt:
02/24/2022
Title:
TRANSMIT DRIVER ARCHITECTURE
52
Patent #:
Issue Dt:
07/18/2023
Application #:
17526830
Filing Dt:
11/15/2021
Publication #:
Pub Dt:
05/19/2022
Title:
BACK-GATE BIASING OF CLOCK TREES USING A REFERENCE GENERATOR
53
Patent #:
Issue Dt:
10/18/2022
Application #:
17532865
Filing Dt:
11/22/2021
Publication #:
Pub Dt:
06/09/2022
Title:
CIRCUITS AND METHODS FOR DETECTING AND UNLOCKING EDGE-PHASE LOCK
54
Patent #:
NONE
Issue Dt:
Application #:
17535776
Filing Dt:
11/26/2021
Publication #:
Pub Dt:
05/26/2022
Title:
COMPARATOR SET-RESET LATCH CIRCUIT AND METHOD FOR CAPACITIVELY STORING BITS
55
Patent #:
Issue Dt:
02/14/2023
Application #:
17576501
Filing Dt:
01/14/2022
Publication #:
Pub Dt:
07/07/2022
Title:
CTLE ADAPTATION BASED ON STATISTICAL ANALYSIS
56
Patent #:
Issue Dt:
07/04/2023
Application #:
17587882
Filing Dt:
01/28/2022
Publication #:
Pub Dt:
07/14/2022
Title:
CIRCUIT AND METHOD TO SET DELAY BETWEEN TWO PERIODIC SIGNALS WITH UNKNOWN PHASE RELATIONSHIP
57
Patent #:
NONE
Issue Dt:
Application #:
17668571
Filing Dt:
02/10/2022
Publication #:
Pub Dt:
08/18/2022
Title:
MEMORY INTERFACE MAPPING
58
Patent #:
Issue Dt:
05/09/2023
Application #:
17668584
Filing Dt:
02/10/2022
Publication #:
Pub Dt:
10/20/2022
Title:
ADJUSTMENT OF MULTI-PHASE CLOCK SYSTEM
59
Patent #:
Issue Dt:
07/25/2023
Application #:
17711328
Filing Dt:
04/01/2022
Publication #:
Pub Dt:
09/08/2022
Title:
RECEIVER/TRANSMITTER CO-CALIBRATION OF VOLTAGE LEVELS IN PULSE AMPLITUDE MODULATION LINKS
60
Patent #:
Issue Dt:
11/28/2023
Application #:
17719974
Filing Dt:
04/13/2022
Publication #:
Pub Dt:
10/13/2022
Title:
Methods and Circuits for Reducing Clock Jitter
61
Patent #:
Issue Dt:
06/06/2023
Application #:
17728607
Filing Dt:
04/25/2022
Publication #:
Pub Dt:
10/06/2022
Title:
OFFSET CALIBRATION FOR SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER
62
Patent #:
Issue Dt:
11/28/2023
Application #:
17840153
Filing Dt:
06/14/2022
Publication #:
Pub Dt:
11/24/2022
Title:
SERIALIZING AND DESERIALIZING STAGE TESTING
63
Patent #:
Issue Dt:
09/05/2023
Application #:
17845034
Filing Dt:
06/21/2022
Title:
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
64
Patent #:
Issue Dt:
09/26/2023
Application #:
17852278
Filing Dt:
06/28/2022
Publication #:
Pub Dt:
12/22/2022
Title:
Methods and Circuits for Decision-Feedback Equalization with Early High-Order-Symbol Detection
65
Patent #:
Issue Dt:
11/28/2023
Application #:
17857338
Filing Dt:
07/05/2022
Publication #:
Pub Dt:
12/22/2022
Title:
Methods and Circuits for Decision-Feedback Equalization Using Compensated Decision Regions
66
Patent #:
Issue Dt:
09/05/2023
Application #:
17864100
Filing Dt:
07/13/2022
Publication #:
Pub Dt:
01/05/2023
Title:
EDGE ENHANCEMENT FOR SIGNAL TRANSMITTER
67
Patent #:
Issue Dt:
11/28/2023
Application #:
17875608
Filing Dt:
07/28/2022
Title:
LOW POWER CURRENT MODE LOGIC
68
Patent #:
Issue Dt:
02/20/2024
Application #:
17879611
Filing Dt:
08/02/2022
Publication #:
Pub Dt:
02/16/2023
Title:
READ EYE TRAINING
69
Patent #:
NONE
Issue Dt:
Application #:
17892262
Filing Dt:
08/22/2022
Publication #:
Pub Dt:
08/24/2023
Title:
FRAGMENTED PERIODIC TIMING CALIBRATION
70
Patent #:
Issue Dt:
01/16/2024
Application #:
17978422
Filing Dt:
11/01/2022
Publication #:
Pub Dt:
04/20/2023
Title:
Multi-Stage Equalizer for Inter-Symbol Interference Cancellation
71
Patent #:
Issue Dt:
08/29/2023
Application #:
18070694
Filing Dt:
11/29/2022
Publication #:
Pub Dt:
05/25/2023
Title:
MATCHED DIGITAL-TO-ANALOG CONVERTERS
72
Patent #:
NONE
Issue Dt:
Application #:
18092561
Filing Dt:
01/03/2023
Publication #:
Pub Dt:
08/10/2023
Title:
BAUD-RATE CLOCK RECOVERY LOCK POINT CONTROL
73
Patent #:
Issue Dt:
01/23/2024
Application #:
18096661
Filing Dt:
01/13/2023
Publication #:
Pub Dt:
07/20/2023
Title:
PATTERN DETECTION BASED PARAMETER ADAPTATION
74
Patent #:
Issue Dt:
03/19/2024
Application #:
18110737
Filing Dt:
02/16/2023
Publication #:
Pub Dt:
08/31/2023
Title:
EFFICIENT STORAGE OF ERROR CORRECTING CODE INFORMATION
75
Patent #:
NONE
Issue Dt:
Application #:
18140142
Filing Dt:
04/27/2023
Publication #:
Pub Dt:
11/30/2023
Title:
LIVE OFFSET CANCELLATION OF THE DECISION FEEDBACK EQUALIZATION DATA SLICERS
76
Patent #:
NONE
Issue Dt:
Application #:
18142977
Filing Dt:
05/03/2023
Publication #:
Pub Dt:
11/09/2023
Title:
SIGNALING COMPRESSION AND DECOMPRESSION ASSOCIATED WITH A PARTIALLY UNROLLED DECISION FEEDBACK EQUALIZER (DFE)
77
Patent #:
NONE
Issue Dt:
Application #:
18320384
Filing Dt:
05/19/2023
Publication #:
Pub Dt:
11/23/2023
Title:
CIRCUIT AND METHOD TO SET DELAY BETWEEN TWO PERIODIC SIGNALS WITH UNKNOWN PHASE RELATIONSHIP
Assignor
1
Exec Dt:
09/06/2023
Assignee
1
2655 SEELY AVENUE
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
HOLLAND & KNIGHT LLP
10 ST. JAMES AVENUE
BOSTON, MA 02116

Search Results as of: 05/23/2024 01:53 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT