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Reel/Frame:057442/0452   Pages: 17
Recorded: 09/10/2021
Attorney Dkt #:MI22-7330
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
03/01/2022
Application #:
17027046
Filing Dt:
09/21/2020
Publication #:
Pub Dt:
03/24/2022
Title:
Vertical Transistor, Integrated Circuitry, Method Of Forming A Vertical Transistor, And Method Of Forming Integrated Circuitry
Assignors
1
Exec Dt:
07/20/2020
2
Exec Dt:
07/16/2020
3
Exec Dt:
07/20/2020
4
Exec Dt:
07/24/2020
5
Exec Dt:
09/09/2021
6
Exec Dt:
09/15/2020
7
Exec Dt:
09/20/2020
8
Exec Dt:
07/27/2020
9
Exec Dt:
07/28/2020
10
Exec Dt:
07/17/2020
11
Exec Dt:
07/20/2020
Assignee
1
8000 SOUTH FEDERAL WAY, MS 1- 525
BOISE, IDAHO 83716
Correspondence name and address
WELLS ST. JOHN P.S.
601 W. MAIN AVENUE
SUITE 600
SPOKANE, WA 99201

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