Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 011394/0454 | |
| Pages: | 7 |
| | Recorded: | 11/29/2000 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
09725401
|
Filing Dt:
|
11/29/2000
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
HIGH SPEED VLSI DIGITAL TESTER ARCHITECTURE FOR REAL-TIME OUTPUT TIMING ACQUISITION, RESULTS ACCUMULATION, AND ANALYSIS
|
|
|
Assignee
|
|
|
|
|
| 2625 WALSH AVENUE |
| SANTA CLARA, CALIFORNIA 95051 |
|
|
Correspondence name and address
|
| |
SCHWEGMAN, LUNDBERG, WOESSNER & KLUTH PA
|
| |
VIET V. TONG
|
| |
P.O. BOX 2938
|
| |
MINNEAPOLIS, MN 55402
|
Search Results as of:
06/16/2024 06:40 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
