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Total properties:
20
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09199041
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Filing Dt:
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11/24/1998
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Title:
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METHOD OF FORMING TITANIUM SILICIDE
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Patent #:
|
|
Issue Dt:
|
09/05/2000
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Application #:
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09199706
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Filing Dt:
|
11/24/1998
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Title:
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METHOD FOR FORMING ISOLATION TRENCHES ON A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
|
10/17/2000
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Application #:
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09220987
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Filing Dt:
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12/23/1998
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Title:
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METHOD FOR CALIBRATING OPTICAL SENSOR USED TO MEASURE THE
TEMPERATURE OF A SUBSTRATE DURING RAPID THERMAL PROCESS
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Patent #:
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|
Issue Dt:
|
03/13/2001
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Application #:
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09223236
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Filing Dt:
|
12/30/1998
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Title:
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MOS TRANSISTOR THAT INHIBITS PUNCHTHROUGH AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
|
01/11/2000
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Application #:
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09223238
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Filing Dt:
|
12/30/1998
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Title:
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METHOD FOR FABRICATING AN LDD MOS TRANSISTOR
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Patent #:
|
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Issue Dt:
|
07/18/2000
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Application #:
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09223458
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Filing Dt:
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12/30/1998
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Title:
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MASKING PROCESS FOR FORMING SELF-ALIGNED DUAL WELLS OR SELF-ALIGNED FIELD-DOPING REGIONS
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Patent #:
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Issue Dt:
|
03/20/2001
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Application #:
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09223471
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Filing Dt:
|
12/30/1998
|
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Title:
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TRENCH STRUCTURE FOR ISOLATING SEMICONDUCTOR ELEMENTS AND METHOD FOR FORMING THE SAME
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|
|
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Patent #:
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|
Issue Dt:
|
06/11/2002
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Application #:
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09261280
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Filing Dt:
|
03/02/1999
|
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Title:
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TEST PATTERN FOR MEASURING VARIATIONS OF CRITICAL DIMENSIONS OF WIRING PATTERNS FORMED IN THE FABRICATION OF SEMICONDUCTOR DEVICES
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|
|
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Patent #:
|
|
Issue Dt:
|
10/02/2001
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Application #:
|
09262789
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Filing Dt:
|
03/04/1999
|
|
Title:
|
METHOD FOR FORMING A MENTAL WIRING PATTERN ON A SEMICONDUCTOR DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/30/2002
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Application #:
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09421454
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Filing Dt:
|
10/19/1999
|
|
Title:
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METHODS AND A DEVICE FOR HEAT TREATMENT A SEMICONDUCTOR WAFER HAVING DIFFERENT KINDS OF IMPURITIES
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|
|
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Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
09517362
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Filing Dt:
|
03/02/2000
|
|
Title:
|
Method of forming trench for semiconductor device isolation
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|
|
|
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Patent #:
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|
Issue Dt:
|
01/15/2002
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Application #:
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09523372
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Filing Dt:
|
03/10/2000
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Title:
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Method of forming shallow trench isolation for preventing torn oxide
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|
|
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Patent #:
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|
Issue Dt:
|
12/03/2002
|
Application #:
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09595851
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Filing Dt:
|
06/16/2000
|
|
Title:
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MOS TRANSISTOR THAT INHIBITS PUNCHTHROUGH
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|
|
|
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Patent #:
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|
Issue Dt:
|
01/22/2002
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Application #:
|
09693466
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Filing Dt:
|
10/20/2000
|
|
Title:
|
Method of fabricating semiconductor device
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|
|
|
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Patent #:
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|
Issue Dt:
|
09/10/2002
|
Application #:
|
09710763
|
Filing Dt:
|
11/11/2000
|
|
Title:
|
METHOD OF FORMING CONTACT PORTION OF SEMICONDUCTOR ELEMENT
|
|
|
|
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Patent #:
|
|
Issue Dt:
|
02/11/2003
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Application #:
|
09946935
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Filing Dt:
|
09/04/2001
|
|
Publication #:
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|
Pub Dt:
|
03/07/2002
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING A RADIO FREQUENCY INTEGRATED CIRCUIT ON EPITAXIAL SILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
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Application #:
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09947419
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Filing Dt:
|
09/05/2001
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|
Publication #:
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Pub Dt:
|
03/21/2002
| | | | |
|
Title:
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METHOD FOR MANUFACTURING LOW VOLTAGE FLASH MEMORY
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|
|
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Patent #:
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|
Issue Dt:
|
04/18/2006
|
Application #:
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10399062
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Filing Dt:
|
04/11/2003
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|
Publication #:
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Pub Dt:
|
02/05/2004
| | | | |
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Title:
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CMP SLURRY COMPOSITION AND A METHOD FOR PLANARIZING SEMICONDUCTOR DEVICE USING THE SAME
|
|
|
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Patent #:
|
|
Issue Dt:
|
11/28/2006
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Application #:
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10418791
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Filing Dt:
|
04/18/2003
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|
Publication #:
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|
Pub Dt:
|
10/21/2004
| | | | |
|
Title:
|
METAL LINE STACKING STRUCTURE IN SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/06/2004
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Application #:
|
10435270
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Filing Dt:
|
05/07/2003
|
|
Publication #:
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Pub Dt:
|
11/13/2003
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
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