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117
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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11008152
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Filing Dt:
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12/10/2004
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Publication #:
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Pub Dt:
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06/16/2005
| | | | |
Title:
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METHOD OF FORMING METAL LINE IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11019250
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Filing Dt:
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12/23/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING DUAL-DAMASCENE PATTERN
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11019267
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Filing Dt:
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12/23/2004
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Publication #:
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Pub Dt:
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06/23/2005
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Title:
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METAL INTERCONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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11020095
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Filing Dt:
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12/27/2004
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Publication #:
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Pub Dt:
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09/15/2005
| | | | |
Title:
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METHOD FOR FABRICATING VERTICAL TRANSISTOR
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11020096
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Filing Dt:
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12/27/2004
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Publication #:
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Pub Dt:
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07/14/2005
| | | | |
Title:
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Method of manufacturing p-channel MOS transistor and CMOS transistor
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11020238
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Filing Dt:
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12/27/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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METHOD OF MANUFACTURING CMOS TRANSISTOR BY USING SOI SUBSTRATE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11020276
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Filing Dt:
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12/27/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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High voltage semiconductor device and fabricating method thereof
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11024435
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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PHASE SHIFT MASK AND FABRICATING METHOD THEREOF
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11024437
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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07/14/2005
| | | | |
Title:
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METHOD OF FABRICATING GATE ELECTRODE OF SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11024439
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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METHOD FOR FORMING STI OF SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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03/04/2008
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Application #:
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11024466
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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METHOD FOR FORMING GATE OXIDE LAYER IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
09/18/2007
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Application #:
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11024467
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Filing Dt:
|
12/30/2004
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Publication #:
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Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD FOR FORMING METAL PATTERN TO REDUCE CONTACT RESISTIVITY WITH INTERCONNECTION CONTACT
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Patent #:
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|
Issue Dt:
|
02/26/2008
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Application #:
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11024468
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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NON-VOLATILE MEMORY DEVICE AND DRIVE METHOD THEREOF
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Patent #:
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Issue Dt:
|
03/11/2008
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Application #:
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11024476
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD FOR FORMING METAL WIRINGS OF SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/23/2007
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Application #:
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11024478
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD FOR FABRICATING SPLIT GATE FLASH MEMORY DEVICE
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Patent #:
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|
Issue Dt:
|
12/12/2006
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Application #:
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11024609
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
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Application #:
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11024610
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
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MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
01/09/2007
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Application #:
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11024628
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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ERASE METHOD IN FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11024629
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE HAVING A DUAL-DAMASCENE GATE AND MANUFACTURING METHOD THEREOF
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Patent #:
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|
Issue Dt:
|
07/18/2006
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Application #:
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11024630
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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SPICE SIMULATION SYSTEM FOR DIODE AND METHOD OF SIMULATION USING THE SAME
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11024631
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FORMING METAL WIRING OF SEMICONDUCTOR DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
03/13/2007
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Application #:
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11024632
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD FOR ISOLATING SEMICONDUCTOR DEVICES
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Patent #:
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NONE
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Issue Dt:
|
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Application #:
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11024652
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
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Capacitor for semiconductor device and fabricating method thereof
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|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
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Application #:
|
11024653
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
CAPACITOR OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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|
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Patent #:
|
|
Issue Dt:
|
09/18/2007
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Application #:
|
11024657
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Filing Dt:
|
12/30/2004
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Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
DUAL DAMASCENE INTERCONNECTION IN SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
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Application #:
|
11024658
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD OF FABRICATING A PHOTOMASK
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Patent #:
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|
Issue Dt:
|
06/19/2007
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Application #:
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11024659
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Filing Dt:
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12/30/2004
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Publication #:
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|
Pub Dt:
|
07/14/2005
| | | | |
Title:
|
METHOD OF FABRICATING SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
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Application #:
|
11024660
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Filing Dt:
|
12/30/2004
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Publication #:
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Pub Dt:
|
06/30/2005
| | | | |
Title:
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METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING SELECTIVE EPITAXIAL GROWTH
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|
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Patent #:
|
|
Issue Dt:
|
06/19/2007
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Application #:
|
11024661
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR FORMING DUAL DAMASCENE INTERCONNECTION IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
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Application #:
|
11024662
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
03/02/2006
| | | | |
Title:
|
METHOD OF FORMING CONTACT HOLE
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|
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Patent #:
|
|
Issue Dt:
|
02/07/2006
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Application #:
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11024673
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
METHOD OF FABRICATING MEMORY CELL IN SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
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Application #:
|
11024678
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FABRICATING TRANSISTOR IN SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11024699
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
Metal pad of semiconductor device and method for bonding the metal pad
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|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
11024700
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Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
FLASH MEMORY DEVICE AND FABRICATING METHOD THEREOF
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|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
11024701
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Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11024704
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
Title:
|
Ion implantation method in semiconductor device
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11024706
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
METHOD OF PATTERING A PHOTORESIST FILM USING A LITHOGRAPHIC
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11024721
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Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
Method of patterning photoresist film
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|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
|
11024724
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Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FABRICATING SPLIT GATE FLASH MEMORY DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11024725
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
Method of fabricating MOS transistor
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|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
11024727
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
07/14/2005
| | | | |
Title:
|
METHOD FOR ETCHING UPPER METAL OF CAPACITATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11024728
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
07/14/2005
| | | | |
Title:
|
METHOD FOR REMOVING MOTTLED ETCH IN SEMICONDUCTOR FABRICATING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
11024731
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11024733
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11024740
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Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11024741
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
Method for forming interconnection line in semiconductor device using a phase-shift photo mask
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|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11024742
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
07/07/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
11024743
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
LITHOGRAPHY APPARATUS AND METHOD FOR MEASURING ALIGNMENT MARK
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2006
|
Application #:
|
11024744
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
NON-VOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11024745
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FABRICATING SPLIT GATE FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
11024746
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHODS OF FABRICATING NONVOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11024748
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11024755
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF CALIBRATING SEMICONDUCTOR LINE WIDTH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11024757
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
11024792
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FABRICATING MOS TRANSISTOR
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11024793
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
Photo mask and method for fabricating the same
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11024795
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FORMING BARRIER METAL IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11024796
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
Dummy layer in semiconductor device and fabricating method thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2007
|
Application #:
|
11024842
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR FORMING DUAL DAMASCENE INTERCONNECTION IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11024845
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
08/04/2005
| | | | |
Title:
|
Method for manufacturing semiconductor device having salicide
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
11024846
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR FABRICATING MOS FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
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Application #:
|
11024847
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR FORMING CONTACT HOLE FOR DUAL DAMASCENE INTERCONNECTION IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
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Application #:
|
11024848
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
NONVOLATILE MEMORY DEVICE AND METHODS OF FABRICATING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
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Application #:
|
11024849
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
FORMING METHOD OF GATE INSULATING LAYER AND NITROGEN DENSITY MEASURING METHOD THEREOF
|
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|
Patent #:
|
|
Issue Dt:
|
09/26/2006
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Application #:
|
11024850
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Filing Dt:
|
12/30/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FABRICATING INTERCONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2008
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Application #:
|
11025989
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Filing Dt:
|
01/03/2005
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Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD FOR FABRICATING METAL WIRINGS OF SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11300292
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Filing Dt:
|
12/15/2005
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Publication #:
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|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
MOS TRANSISTOR AND MANUFACTURING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
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Application #:
|
11304771
|
Filing Dt:
|
12/16/2005
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Publication #:
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|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH A METAL LINE AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11313693
|
Filing Dt:
|
12/22/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
METHOD OF MANUFACTURING A HIGH VOLTAGE SEMICONDUCTOR DEVICE INCLUDING A DEEP WELL AND A GATE OXIDE LAYER SIMULTANEOUSLY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
11313698
|
Filing Dt:
|
12/22/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
METHOD OF FORMING A METAL INTERCONNECTION LINE IN A SEMICONDUCTOR DEVICE USING AN FSG LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11313851
|
Filing Dt:
|
12/22/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
DRY ETCHING METHOD AND APPARATUS FOR PERFORMING DRY ETCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
11313852
|
Filing Dt:
|
12/22/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
11315013
|
Filing Dt:
|
12/23/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11315369
|
Filing Dt:
|
12/23/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11315501
|
Filing Dt:
|
12/23/2005
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
Metal-to-metal capacitor
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11318507
|
Filing Dt:
|
12/28/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
Cleaning method for removing copper-based foreign particles
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11318508
|
Filing Dt:
|
12/28/2005
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
Title:
|
Baking apparatus used in photolithography process, and method for controlling critical dimension of photoresist patterns using the same
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11319546
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
METHOD FOR FORMING AN ALUMINUM CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
11319610
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
A FLASH MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
11319616
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
METHOD OF FORMING PAD AND FUSE IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2008
|
Application #:
|
11319617
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
METHOD OF CLEANING SILICON NITRIDE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11319618
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
METHOD FOR FORMING SHALLOW TRENCH ISOLATION IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11319696
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
METHOD FOR FORMING SHALLOW TRENCH ISOLATION UTILIZING TWO FILLING OXIDE LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2009
|
Application #:
|
11319697
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11319700
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
Non volatile memory device and method of manufacturing the same
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11319709
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
Method of sequentially forming silicide layer and contact barrier in semiconductor integrated circuit device
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11319710
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
04/19/2007
| | | | |
Title:
|
METHOD OF FORMING SHALLOW TRENCH ISOLATION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11320396
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
Method for forming an intermetal dielectric layer in a semiconductor device using HDP-CVD, and a semiconductor device manufactured thereby
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11320397
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH A METAL LINE AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11320399
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
METHOD FOR FABRICATING A METAL-INSULATOR-METAL CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
11320408
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
METHOD FOR FORMING A PLURALITY OF METAL LINES IN A SEMICONDUCTOR DEVICE USING DUAL INSULATING LAYER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11320466
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
Wafer transfer apparatus having two independently movable transfer modules
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11320579
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
SELF-ALIGNED BIPOLAR SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2007
|
Application #:
|
11320580
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
METHOD OF MANUFACTURING AN ISOLATION LAYER OF A FLASH MEMORY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11320586
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
Method of manufacturing a flash memory device
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11320587
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH A METAL LINE AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11320588
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11320589
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
Method for photomask processing
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11320590
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
METHOD FOR FABRICATING A METAL-INSULATOR-METAL CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
11320591
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
METHOD OF FORMING ISOLATION OXIDE LAYER IN SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|