Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 036739/0469 | |
| Pages: | 6 |
| | Recorded: | 10/06/2015 | | |
| Attorney Dkt #: | 13-SC-1094-US02 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
14876332
|
Filing Dt:
|
10/06/2015
|
|
Publication #:
|
|
Pub Dt:
|
01/28/2016
| | | | |
|
Title:
|
VOLTAGE OPTIMIZATION CIRCUIT AND MANAGING VOLTAGE MARGINS OF AN INTEGRATED CIRCUIT
|
|
|
Assignee
|
|
|
|
|
| 2701 SAN TOMAS EXPRESSWAY |
| SANTA CLARA, CALIFORNIA 95050 |
|
|
Correspondence name and address
|
| |
HITT GAINESS P.C./NVIDIA
|
| |
P.O. BOX 832570
|
| |
RICHARDSON, TX 75083
|
Search Results as of:
05/30/2024 01:49 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
