Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 026145/0477 | |
| Pages: | 3 |
| | Recorded: | 04/18/2011 | | |
Attorney Dkt #: | 852763.503C1 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
13022419
|
Filing Dt:
|
02/07/2011
|
Publication #:
|
|
Pub Dt:
|
08/04/2011
| | | | |
Title:
|
CIRCUIT ARCHITECTURE FOR THE PARALLEL SUPPLYING DURING AN ELECTRIC OR ELECTROMAGNETIC TESTING OF A PLURALITY OF ELECTRONIC DEVICES INTEGRATED ON A SEMICONDUCTOR WAFER
|
|
Assignee
|
|
|
VIA C. OLIVETTI, 2 |
AGRATE BRIANZA, ITALY 20041 |
|
Correspondence name and address
|
|
ROBERT IANNUCCI
|
|
701 FIFTH AVENUE
|
|
SUITE 5400
|
|
SEATTLE, WA 98104
|
Search Results as of:
06/03/2024 04:40 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|