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Patent Assignment Details
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Reel/Frame:010298/0481   Pages: 5
Recorded: 10/12/1999
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
09/28/2004
Application #:
09332271
Filing Dt:
06/11/1999
Publication #:
Pub Dt:
04/03/2003
Title:
METHODS FOR FORMING WORDLINES, TRANSISTOR GATES, AND CONDUCTIVE INTERCONNECTS, AND WORDLINE, TRANSISTOR GATE, AND CONDUCTIVE INTERCONNECT STRUCTURES
Assignors
1
Exec Dt:
05/24/1999
2
Exec Dt:
05/24/1999
Assignee
1
8000 SOUTH FEDERAL WAY
BOISE, IDAHO 83706
Correspondence name and address
WELLS, ST. JOHN, ROBERT, GREGORY ET AL
DAVID G. LATWESEN, PH.D.
601 WEST FIRST AVE., SUITE 1300
SPOKANE, WA 99201-3828

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