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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:009857/0495   Pages: 4
Recorded: 03/29/1999
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 40
1
Patent #:
Issue Dt:
06/22/1993
Application #:
07625807
Filing Dt:
12/11/1990
Title:
SINGLE TRANSISTOR EEPROM MEMORY CELL
2
Patent #:
Issue Dt:
03/23/1993
Application #:
07645507
Filing Dt:
01/24/1991
Title:
SINGLE TRANSISTOR EEPROM ARCHITECTURE
3
Patent #:
Issue Dt:
03/01/1994
Application #:
07734414
Filing Dt:
07/23/1991
Title:
METHODS AND APPARATUS FOR HARD DISK EMULATION
4
Patent #:
Issue Dt:
05/31/1994
Application #:
07764019
Filing Dt:
09/23/1991
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY CELL
5
Patent #:
Issue Dt:
03/22/1994
Application #:
07896772
Filing Dt:
06/10/1992
Title:
ELECTRICAL ERASABLE PROGRAMMABLE READ-ONLY MEMORY ARRAY
6
Patent #:
Issue Dt:
06/21/1994
Application #:
07897215
Filing Dt:
06/10/1992
Title:
METHOD AND APPARATUS FOR PROGRAMMING ELECTRICAL ERASABLE PROGRAMMABLE READ-ONLY MEMORY ARRAYS
7
Patent #:
Issue Dt:
10/18/1994
Application #:
08026940
Filing Dt:
03/05/1993
Title:
SINGLE TRANSISTOR EEPROM MEMORY CELL
8
Patent #:
Issue Dt:
04/16/1996
Application #:
08064531
Filing Dt:
05/20/1993
Title:
ELECTRONICALLY ERASABLE-PROGRAMMABLE MEMORY CELL HAVING BURIED BIT LINE
9
Patent #:
Issue Dt:
12/13/1994
Application #:
08132942
Filing Dt:
10/07/1993
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY CELL
10
Patent #:
Issue Dt:
09/06/1994
Application #:
08151597
Filing Dt:
11/12/1993
Title:
SINGLE TRANSISTOR EEPROM ARCHITECTURE
11
Patent #:
Issue Dt:
04/25/1995
Application #:
08153696
Filing Dt:
11/17/1993
Title:
SOLID STATE MEMORY DEVICE HAVING SERIAL INPUT/OUTPUT
12
Patent #:
Issue Dt:
05/09/1995
Application #:
08245189
Filing Dt:
05/17/1994
Title:
ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY ARRAY
13
Patent #:
Issue Dt:
04/18/1995
Application #:
08258050
Filing Dt:
06/10/1994
Title:
SINGLE TRANSISTOR EEPROM ARCHITECTURE
14
Patent #:
Issue Dt:
10/08/1996
Application #:
08370712
Filing Dt:
01/10/1995
Title:
ROW DECODER FOR A MEMORY HAVING SETTABLE THRESHOLD MEMORY CELL
15
Patent #:
Issue Dt:
10/15/1996
Application #:
08394101
Filing Dt:
02/24/1995
Title:
ROLL SUPPORT HUB BRAKING MECHANISM
16
Patent #:
Issue Dt:
04/08/1997
Application #:
08589687
Filing Dt:
01/22/1996
Title:
DYNAMIC SEMICONDUCTOR MEMORY DEVICE THAT CAN CONTROL THROUGH CURRENT OF INPUT BUFFER CIRCUIT FOR EXTERNAL INPUT/OUTPUT CONTROL SIGNAL
17
Patent #:
Issue Dt:
10/22/1996
Application #:
08596408
Filing Dt:
02/02/1996
Title:
PROGRAM DRAIN VOLTAGE CONTROL FOR EPROM/FLASH
18
Patent #:
Issue Dt:
06/24/1997
Application #:
08596432
Filing Dt:
02/02/1996
Title:
SYSTEM AND METHOD FOR CONTROLLING SOURCE CURRENT AND VOLTAGE DURING FLASH MEMORY ERASE OPERATIONS
19
Patent #:
Issue Dt:
11/26/1996
Application #:
08596505
Filing Dt:
02/05/1996
Title:
PROGRAM VERIFY AND ERASE VERIFY CONTROL CIRCUIT FOR EPROM/FLASH
20
Patent #:
Issue Dt:
08/26/1997
Application #:
08596527
Filing Dt:
02/05/1996
Title:
ON-CHIP POSITIVE AND NEGATIVE HIGH VOLTAGE WORDLINE X-DECODING FOR EPROM/FLASH
21
Patent #:
Issue Dt:
03/03/1998
Application #:
08601963
Filing Dt:
02/15/1996
Title:
NON-VOLATILE PROGRAMMABLE MEMORY HAVING AN SRAM CAPABILITY
22
Patent #:
Issue Dt:
10/06/1998
Application #:
08606721
Filing Dt:
02/27/1996
Title:
RECORDING APPARATUS AND METHOD HAVING LOW POWER CONSUMPTION
23
Patent #:
Issue Dt:
06/16/1998
Application #:
08742073
Filing Dt:
10/31/1996
Title:
DISTRIBUTION CHARGE PUMP FOR NONVOLATILE MEMORY DEVICE
24
Patent #:
Issue Dt:
03/17/1998
Application #:
08768914
Filing Dt:
12/17/1996
Title:
SPACE EFFICIENT COLUMN DECODER FOR FLASH MEMORY REDUNDANT COLUMNS
25
Patent #:
Issue Dt:
09/29/1998
Application #:
08823937
Filing Dt:
03/25/1997
Title:
ADAPTER FOR INTERFACING AN INSERTABLE/REMOVABLE DIGITAL MEMORY APPARATUS TO A HOST DATA PORT
26
Patent #:
Issue Dt:
03/30/1999
Application #:
08915955
Filing Dt:
08/21/1997
Title:
METHOD AND APPARATUS FOR OPERATING FUNCTIONS RELATING TO MEMORY AND/OR APPLICATIONS THAT EMPLOY MEMORY IN ACCORDANCE WITH AVAILABLE POWER
27
Patent #:
Issue Dt:
03/23/1999
Application #:
08917008
Filing Dt:
08/21/1997
Title:
HIGH VOLTAGE CHARGE TRANSFER STAGE
28
Patent #:
Issue Dt:
09/22/1998
Application #:
08918355
Filing Dt:
08/26/1997
Title:
SYSTEM AND METHOD FOR A HIGH SPEED, HIGH VOLTAGE LATCH FOR MEMORY DEVICES
29
Patent #:
Issue Dt:
10/26/1999
Application #:
08938420
Filing Dt:
09/25/1997
Title:
FLASH MEMORY ARRAY HAVING WELL CONTACT STRUCTURES
30
Patent #:
Issue Dt:
01/19/1999
Application #:
08939785
Filing Dt:
09/29/1997
Title:
NON-VOLATILE PROGRAMMABLE MEMORY HAVING A BUFFERING CAPABILITY AND METHOD OF OPERATION THEREOF
31
Patent #:
Issue Dt:
11/23/1999
Application #:
08957094
Filing Dt:
10/24/1997
Title:
METHOD AND APPARATUS FOR PROVIDING ACCESSIBLE DEVICE INFORMATION IN DIGITAL MEMORY DEVICES
32
Patent #:
Issue Dt:
03/23/1999
Application #:
08958289
Filing Dt:
10/27/1997
Title:
LOCAL ROW DECODER FOR SECTOR-ERASE FOWLER-NORDHEIM TUNNELING BASED FLASH MEMORY
33
Patent #:
Issue Dt:
10/26/1999
Application #:
09007398
Filing Dt:
01/15/1998
Title:
DIVIDED BIT LINE SYSTEM FOR NON-VOLATILE MEMORY DEVICES
34
Patent #:
Issue Dt:
12/07/1999
Application #:
09010202
Filing Dt:
01/21/1998
Title:
ROW DECODER FOR NONVOLATILE MEMORY HAVING A LOW-VOLTAGE POWER SUPPLY
35
Patent #:
Issue Dt:
11/23/1999
Application #:
09054423
Filing Dt:
04/02/1998
Title:
LOCAL ROW DECODER AND ASSOCIATED CONTROL LOGIC FOR FOWLER-NORDHEIM TUNNELING BASED FLASH MEMORY
36
Patent #:
Issue Dt:
02/15/2000
Application #:
09084044
Filing Dt:
05/22/1998
Title:
INSERTABLE AND REMOVABLE HIGH CAPACITY DIGITAL MEMORY APPARATUS AND METHODS OF OPERATION THEREOF
37
Patent #:
Issue Dt:
02/29/2000
Application #:
09095176
Filing Dt:
06/10/1998
Title:
FAST ON-CHIP CURRENT MEASUREMENT CIRCUIT AND METHOD FOR USE WITH MEMORY ARRAY CIRCUITS
38
Patent #:
Issue Dt:
05/30/2000
Application #:
09095199
Filing Dt:
06/10/1998
Title:
LEAKAGE IMPROVED CHARGE PUMP FOR NONVOLATILE MEMORY DEVICE
39
Patent #:
Issue Dt:
09/19/2000
Application #:
09108759
Filing Dt:
07/01/1998
Title:
ARCHITECTURE AND METHOD FOR PERFORMING PAGE WRITE/VERIFY IN A FLASH MEMORY CHIP
40
Patent #:
Issue Dt:
11/02/1999
Application #:
09133659
Filing Dt:
08/12/1998
Title:
ERASE AND PROGRAM CONTROL STATE MACHINES FOR FLASH MEMORY
Assignor
1
Exec Dt:
03/03/1999
Assignee
1
3114 SCOTT BLVD.
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
WILSON SONSINI GOODRICH & ROSATI
RENEE WHITAKER UNTI
PC 2-2
650 PAGE MILL ROAD
PALO ALTO, CA 94304-1050

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