Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 023134/0498 | |
| Pages: | 5 |
| | Recorded: | 08/25/2009 | | |
Attorney Dkt #: | SEL/GSI |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
Total properties:
8
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11404191
|
Filing Dt:
|
04/14/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
PERFORMING READ AND WRITE OPERATIONS IN THE SAME CYCLE FOR AN SRAM DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
11404353
|
Filing Dt:
|
04/14/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
SHIFT REGISTERS FREE OF TIMING RACE BOUNDARY SCAN REGISTERS WITH TWO-PHASE CLOCK CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
11410352
|
Filing Dt:
|
04/24/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
MINIMIZED LINE SKEW GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
11414612
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
TEST SEMICONDUCTOR DEVICE IN FULL FREQUENCY WITH HALF FREQUENCY TESTER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11417805
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
DYNAMIC SENSE AMPLIFIER FOR SRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11436260
|
Filing Dt:
|
05/17/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
PROGRAMMABLE IMPEDANCE CONTROL CIRCUIT CALIBRATED AT VOH, VOL LEVEL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
12078782
|
Filing Dt:
|
04/04/2008
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
DYNAMIC DUAL CONTROL ON-DIE TERMINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2010
|
Application #:
|
12079100
|
Filing Dt:
|
03/24/2008
|
Publication #:
|
|
Pub Dt:
|
09/24/2009
| | | | |
Title:
|
EFFICIENT METHOD FOR IMPLEMENTING PROGRAMMABLE IMPEDANCE OUTPUT DRIVERS AND PROGRAMMABLE INPUT ON DIE TERMINATION ON A BI-DIRECTIONAL DATA BUS
|
|
Assignee
|
|
|
1 SONY DRIVE |
PARKRIDGE, NEW JERSEY 07656 |
|
Correspondence name and address
|
|
SONY CORPORATION OF AMERICA
|
|
16530 VIA ESPRILLO, MZ 7190
|
|
SAN DIEGO, CA 92127
|
Search Results as of:
06/01/2024 12:32 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|