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Patent Assignment Details

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Reel/Frame:	034177/0499			Pages:	13
		Recorded:	11/14/2014
Attorney Dkt #:	HICAG000
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 15

Patent #:	7650460	Issue Dt:	01/19/2010	Application #:	12011311	Filing Dt:	01/25/2008
Publication #:	US20080183958	Pub Dt:	07/31/2008
Title:	HIERARCHICAL IMMUTABLE CONTENT-ADDRESSABLE MEMORY PROCESSOR

Patent #:	8316276	Issue Dt:	11/20/2012	Application #:	12137919	Filing Dt:	06/12/2008
Publication #:	US20090183057	Pub Dt:	07/16/2009
Title:	UPPER LAYER PROTOCOL (ULP) OFFLOADING FOR INTERNET SMALL COMPUTER SYSTEM INTERFACE (ISCSI) WITHOUT TCP OFFLOAD ENGINE (TOE)

Patent #:	8370458	Issue Dt:	02/05/2013	Application #:	12317375	Filing Dt:	12/19/2008
Publication #:	US20090164754	Pub Dt:	06/25/2009
Title:	HIERARCHICAL BLOCK-IDENTIFIED DATA COMMUNICATION FOR UNIFIED HANDLING OF STRUCTURED DATA AND DATA COMPRESSION

Patent #:	8065476	Issue Dt:	11/22/2011	Application #:	12653889	Filing Dt:	12/17/2009
Publication #:	US20100100673	Pub Dt:	04/22/2010
Title:	HIERARCHICAL IMMUTABLE CONTENT-ADDRESSABLE MEMORY PROCESSOR

Patent #:	8407428	Issue Dt:	03/26/2013	Application #:	12784268	Filing Dt:	05/20/2010
Publication #:	US20130024645	Pub Dt:	01/24/2013
Title:	STRUCTURED MEMORY COPROCESSOR

Patent #:	8838656	Issue Dt:	09/16/2014	Application #:	12804900	Filing Dt:	07/29/2010
Title:	HARDWARE-PROTECTED REFERENCE COUNT-BASED MEMORY MANAGEMENT USING WEAK REFERENCES

Patent #:	9047334	Issue Dt:	06/02/2015	Application #:	12804901	Filing Dt:	07/29/2010
Title:	Merge-update for efficient atomic memory modification in concurrent computer systems

Patent #:	9601199	Issue Dt:	03/21/2017	Application #:	12842958	Filing Dt:	07/23/2010
Publication #:	US20110010347	Pub Dt:	01/13/2011
Title:	ITERATOR REGISTER FOR STRUCTURED MEMORY

Patent #:	9501421	Issue Dt:	11/22/2016	Application #:	13541396	Filing Dt:	07/03/2012
Title:	MEMORY SHARING AND PAGE DEDUPLICATION USING INDIRECT LINES

Patent #:	9208082	Issue Dt:	12/08/2015	Application #:	13712878	Filing Dt:	12/12/2012
Title:	HARDWARE-SUPPORTED PER-PROCESS METADATA TAGS

Patent #:	NONE	Issue Dt:		Application #:	13829527	Filing Dt:	03/14/2013
Publication #:	US20130275699	Pub Dt:	10/17/2013
Title:	SPECIAL MEMORY ACCESS PATH WITH SEGMENT-OFFSET ADDRESSING

Patent #:	9502139	Issue Dt:	11/22/2016	Application #:	14058919	Filing Dt:	10/21/2013
Title:	FINE GRAINED ONLINE REMAPPING TO HANDLE MEMORY ERRORS

Patent #:	9798630	Issue Dt:	10/24/2017	Application #:	14178038	Filing Dt:	02/11/2014
Publication #:	US20140258660	Pub Dt:	09/11/2014
Title:	HARDWARE-SUPPORTED MEMORY TEMPORAL COPY

Patent #:	9477558	Issue Dt:	10/25/2016	Application #:	14178130	Filing Dt:	02/11/2014
Publication #:	US20140258777	Pub Dt:	09/11/2014
Title:	HARDWARE SUPPORTED MEMORY LOGGING

Patent #:	9898410	Issue Dt:	02/20/2018	Application #:	14479676	Filing Dt:	09/08/2014
Publication #:	US20150074339	Pub Dt:	03/12/2015
Title:	HYBRID MAIN MEMORY USING A FINE-GRAIN LEVEL OF REMAPPING

Assignor

Exec Dt:

11/13/2014

Assignee

C/O HOPKINS & CARLEY, ATTN: GAIL HASHIMOTO

70 S. FIRST STREET

SAN JOSE, CALIFORNIA 95113

Correspondence name and address
	VAN PELT, YI & JAMES LLP
	10050 N. FOOTHILL BLVD., SUITE 200
	CUPERTINO, CA 95014

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