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Total properties:
56
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Patent #:
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|
Issue Dt:
|
07/14/1998
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Application #:
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08907004
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Filing Dt:
|
08/06/1997
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Title:
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DECODING METHOD FOR ROM MATRIX HAVING A SILICON CONTROLLED RECTIFIER STRUCTURE
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|
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Patent #:
|
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Issue Dt:
|
04/11/2000
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Application #:
|
09055577
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Filing Dt:
|
04/06/1998
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|
Title:
|
METHOD OF FABRICATING EMBEDDED DYNAMIC RANDOM ACCESS MEMORY
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|
|
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Patent #:
|
|
Issue Dt:
|
12/07/1999
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Application #:
|
09056230
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Filing Dt:
|
04/07/1998
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|
Title:
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METHOD OF FABRICATING SHALLOW TRENCH ISOLATION STRUCTURES USING A OXIDIZED POLYSILICON TRENCH MASK
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|
|
|
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Patent #:
|
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Issue Dt:
|
08/15/2000
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Application #:
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09062661
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Filing Dt:
|
04/20/1998
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|
Title:
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METHOD OF FORMING A CONTACT WINDOW
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/08/2000
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Application #:
|
09136544
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Filing Dt:
|
08/19/1998
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Title:
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STRUCTURE OF A BONDING PAD FOR SEMICONDUCTOR DEVICES
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Patent #:
|
|
Issue Dt:
|
07/04/2000
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Application #:
|
09136580
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Filing Dt:
|
08/19/1998
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Title:
|
ION IMPLANTER
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Patent #:
|
|
Issue Dt:
|
10/24/2000
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Application #:
|
09136629
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Filing Dt:
|
08/19/1998
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|
Title:
|
METHOD FOR REMOVING PHOTORESIST IN METALLIZATION PROCESS
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|
|
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Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
09143066
|
Filing Dt:
|
08/28/1998
|
|
Title:
|
METHOD OF FORMING A THICK POLYSILICON LAYER
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/26/2002
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Application #:
|
09143267
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Filing Dt:
|
08/28/1998
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|
Publication #:
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Pub Dt:
|
04/25/2002
| | | | |
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Title:
|
PLANARIZATION METHOD ON A DAMASCENE STRUCTURE
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|
|
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Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
09143421
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Filing Dt:
|
08/28/1998
|
|
Title:
|
SLURRY PROVIDING SYSTEM
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|
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|
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Patent #:
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|
Issue Dt:
|
01/16/2001
|
Application #:
|
09173084
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Filing Dt:
|
10/14/1998
|
|
Title:
|
DUAL DAMASCENE MANUFACTURING PROCESS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
09173486
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Filing Dt:
|
10/14/1998
|
|
Title:
|
METHOD OF IMPROVING SELECTIVITY BETWEEN SILICON NITRIDE AND SILICON OXIDE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/06/2001
|
Application #:
|
09191328
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Filing Dt:
|
11/13/1998
|
|
Title:
|
WAFER ALIGNMENT SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
09191801
|
Filing Dt:
|
11/13/1998
|
|
Title:
|
PHOTORESIST DISPENSE PUMP
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
09191912
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Filing Dt:
|
11/13/1998
|
|
Title:
|
ALIGNER DETECTOR INCLUDING AN ELECTROOPTIC MODULATOR FOR EACH DIFFRACTION ORDER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09191913
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Filing Dt:
|
11/13/1998
|
|
Title:
|
METHOD FOR FABRICATING GATE OXIDE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09193220
|
Filing Dt:
|
11/16/1998
|
|
Title:
|
EXPOSURE FOR PERFORMING SYNCHRONIZED OFF-AXIS ALIGNMENT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09205866
|
Filing Dt:
|
12/04/1998
|
|
Title:
|
METHOD FOR PREPARING A DUMMY WAFER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
09206064
|
Filing Dt:
|
12/04/1998
|
|
Title:
|
METHOD FOR FABRICATING A CAPACITOR OF A DRAM WITH AN HSG LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09206178
|
Filing Dt:
|
12/04/1998
|
|
Title:
|
METHOD FOR FABRICATING A TRANSISTOR GATE WITH A T-LIKE STRUCTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
09213695
|
Filing Dt:
|
12/17/1998
|
|
Title:
|
METHOD FABRICATING A DATA-STORAGE CAPACITOR FOR A DYNAMIC RANDOM-ACCESS MEMORY DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09213699
|
Filing Dt:
|
12/17/1998
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2001
| | | | |
|
Title:
|
METHOD OF MANUFACTURING UNLANDED VIA PLUG
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09213882
|
Filing Dt:
|
12/17/1998
|
|
Title:
|
MONITOR PATTERN FOR PHOTOLITHOGRAPHY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
09215591
|
Filing Dt:
|
12/17/1998
|
|
Title:
|
METHOD FOR PLANARIZING A DAMASCENE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09215618
|
Filing Dt:
|
12/17/1998
|
|
Title:
|
SEMICONDUCTOR READ-ONLY MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2001
|
Application #:
|
09222654
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
METHOD FOR IMPROVING THE UNIFORMITY OF WAFER-TO-WAFER FILM THICKNESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09223196
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
METHOD OF FABRICATING AN IMPROVED SPACER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
09223327
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
METHOD FOR ALIGNING SHALLOW TRENCH ISOLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2001
|
Application #:
|
09223408
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
USING ARL TO DECREASE EPD NOISE IN CMP PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2000
|
Application #:
|
09234976
|
Filing Dt:
|
01/22/1999
|
|
Title:
|
ALIGNMENT STRATEGY FOR ASSYMMETRICAL ALIGNMENT MARKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
09241545
|
Filing Dt:
|
02/01/1999
|
|
Title:
|
METHOD OF FABRICATING MIXED-MODE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2001
|
Application #:
|
09246225
|
Filing Dt:
|
02/08/1999
|
|
Title:
|
MASK COMPATIBLE WITH DIFFERENT STEPPERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
09246754
|
Filing Dt:
|
02/08/1999
|
|
Title:
|
METHOD OF ADJUSTING FOR PARALLEL ALIGNMENT BETWEEN A SHOWER HEAD AND A HEATER PLATFORM IN A CHAMBER USED IN INTEGRATED CIRCUIT FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2001
|
Application #:
|
09246761
|
Filing Dt:
|
02/08/1999
|
|
Title:
|
METHOD OF FORMING NODE CONTACT OPENING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
|
09250631
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Filing Dt:
|
02/16/1999
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2001
| | | | |
|
Title:
|
METHOD OF FABRICATING CU INTERCONNECTS WITH REDUCED CU CONTAMINATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
09250765
|
Filing Dt:
|
02/16/1999
|
|
Title:
|
CAPACITOR IN A DYNAMIC RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
09267759
|
Filing Dt:
|
03/11/1999
|
|
Title:
|
METHOD FOR FORMING A SELF-ALIGNED CONTACT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
09268883
|
Filing Dt:
|
03/16/1999
|
|
Title:
|
METHOD OF IMPROVING JUNCTION LEAKAGE PROBLEM OF SHALLOW TRENCH ISOLATION BY COVERING SAID STI WITH AN INSULATING LAYER DURING SALICIDE PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
09270024
|
Filing Dt:
|
03/16/1999
|
|
Title:
|
METHOD OF FABRICATING CAPACITOR WITH A RING TRENCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
09280627
|
Filing Dt:
|
03/29/1999
|
|
Title:
|
METHOD FOR FORMING A SHALLOW TRENCH ISOLATION STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2001
|
Application #:
|
09282015
|
Filing Dt:
|
03/29/1999
|
|
Title:
|
METHOD FOR FABRICATING A NONVOLATILE MEMORY INCLUDING IMPLANTING THE SOURCE REGION, FORMING THE FIRST SPACERS, IMPLANTING THE DRAIN REGION, FORMING THE SECOND SPACERS, AND FORMING A SOURCE LINE ON THE SOURCE AND SECOND SPACERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2001
|
Application #:
|
09286080
|
Filing Dt:
|
04/05/1999
|
|
Title:
|
METHOD OF FABRICATING A NODE CONTACT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09286353
|
Filing Dt:
|
04/05/1999
|
|
Title:
|
METHOD OF FABRICATING DRAM CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
09299721
|
Filing Dt:
|
04/26/1999
|
|
Title:
|
METHOD FOR FORMING BOTTOM ELECTRODE OF CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
09306092
|
Filing Dt:
|
05/06/1999
|
|
Title:
|
DUAL DAMASCENE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
09306114
|
Filing Dt:
|
05/06/1999
|
|
Title:
|
CIRCUIT STRUCTURE WHICH AVOIDS LATCHUP EFFEXT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2001
|
Application #:
|
09306244
|
Filing Dt:
|
05/06/1999
|
|
Title:
|
METHOD OF FABRICATING A CONTACT WINDOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
09306260
|
Filing Dt:
|
05/06/1999
|
|
Title:
|
DEVELOPER CUP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
09313518
|
Filing Dt:
|
05/17/1999
|
|
Title:
|
VOLTAGE BOOSTING CIRCUIT HAVING ASYMMETRIC MOS IN DRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09326379
|
Filing Dt:
|
06/04/1999
|
|
Title:
|
METHOD OF INCREASING CONTACT AREA OF A CONTACT WINDOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09329111
|
Filing Dt:
|
06/09/1999
|
|
Title:
|
METHOD OF IMPROVING EDGE RECESS PROBLEM OF SHALLOW TRENCH ISOLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2001
|
Application #:
|
09329112
|
Filing Dt:
|
06/09/1999
|
|
Title:
|
INPUT/OUTPUT CIRCUIT WITH HIGH INPUT/OUTPUT VOLTAGE TOLERANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09329114
|
Filing Dt:
|
06/09/1999
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2001
| | | | |
|
Title:
|
SOLID POWDER TRAPPING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2001
|
Application #:
|
09347610
|
Filing Dt:
|
07/02/1999
|
|
Title:
|
METHOD OF FABRICATING A CONDUCTIVE PLUG WITH A LOW JUNCTION RESISTANCE IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2001
|
Application #:
|
09347612
|
Filing Dt:
|
07/02/1999
|
|
Title:
|
METHOD FOR MANUALLY MANUFACTURING CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2001
|
Application #:
|
09347619
|
Filing Dt:
|
07/02/1999
|
|
Title:
|
WAFER MAPPING APPARATUS
|
|
