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Patent Assignment Details
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Reel/Frame:039667/0505   Pages: 28
Recorded: 08/12/2016
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3
1
Patent #:
Issue Dt:
11/22/2016
Application #:
15094985
Filing Dt:
04/08/2016
Publication #:
Pub Dt:
10/13/2016
Title:
SEMICONDUCTOR STRUCTURE AND ETCH TECHNIQUE FOR MONOLITHIC INTEGRATION OF III-N TRANSISTORS
2
Patent #:
Issue Dt:
03/06/2018
Application #:
15213054
Filing Dt:
07/18/2016
Publication #:
Pub Dt:
01/19/2017
Title:
FIELD-PLATE STRUCTURES FOR SEMICONDUCTOR DEVICES
3
Patent #:
Issue Dt:
01/03/2017
Application #:
15234405
Filing Dt:
08/11/2016
Publication #:
Pub Dt:
12/01/2016
Title:
SEMICONDUCTOR STRUCTURE WITH A SPACER LAYER
Assignors
1
Exec Dt:
08/11/2016
2
Exec Dt:
04/01/2013
3
Exec Dt:
10/07/2013
4
Exec Dt:
10/01/2013
5
Exec Dt:
10/06/2014
Assignee
1
ONE BROADWAY, 14TH FLOOR
CAMBRIDGE, MASSACHUSETTS 02142
Correspondence name and address
AMERICAN PATENT AGENCY PC
845 THIRD AVENUE, 6TH FLOOR
NEW YORK, NY 10022

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