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Reel/Frame:	049160/0509			Pages:	6
		Recorded:	05/13/2019
Attorney Dkt #:	014951-1877
Conveyance:	GRANT OF SECURITY INTEREST -- PATENTS

Total properties: 13

Patent #:	6566610	Issue Dt:	05/20/2003	Application #:	10032908	Filing Dt:	11/01/2001
Publication #:	US20030079909	Pub Dt:	05/01/2003
Title:	STACKING MULTIPLE DEVICES USING DIRECT SOLDERING

Patent #:	7167373	Issue Dt:	01/23/2007	Application #:	10796540	Filing Dt:	03/08/2004
Title:	STACKING MULTIPLE DEVICES USING FLEXIBLE CIRCUIT

Patent #:	7786563	Issue Dt:	08/31/2010	Application #:	11824168	Filing Dt:	06/28/2007
Title:	STACKING MULTIPLE DEVICES USING SINGLE-PIECE INTERCONNECTING ELEMENT

Patent #:	9064716	Issue Dt:	06/23/2015	Application #:	12571313	Filing Dt:	09/30/2009
Publication #:	US20110074002	Pub Dt:	03/31/2011
Title:	STACKING DEVICES AT FINISHED PACKAGE LEVEL

Patent #:	8090988	Issue Dt:	01/03/2012	Application #:	12625422	Filing Dt:	11/24/2009
Publication #:	US20110126046	Pub Dt:	05/26/2011
Title:	SAVING INFORMATION TO FLASH MEMORY DURING POWER FAILURE

Patent #:	8124450	Issue Dt:	02/28/2012	Application #:	12844795	Filing Dt:	07/27/2010
Publication #:	US20100291736	Pub Dt:	11/18/2010
Title:	STACKING MULTIPLE DEVICES USING SINGLE-PIECE INTERCONNECTING ELEMENT

Patent #:	8784125	Issue Dt:	07/22/2014	Application #:	13535309	Filing Dt:	06/27/2012
Publication #:	US20140004731	Pub Dt:	01/02/2014
Title:	SIDE RETAINER ASSEMBLY FOR HEAT SINK AND MEMORY MODULES

Patent #:	9099173	Issue Dt:	08/04/2015	Application #:	13715807	Filing Dt:	12/14/2012
Publication #:	US20140173369	Pub Dt:	06/19/2014
Title:	CLASSIFYING FLASH DEVICES USING ECC

Patent #:	8990484	Issue Dt:	03/24/2015	Application #:	13715903	Filing Dt:	12/14/2012
Publication #:	US20140173176	Pub Dt:	06/19/2014
Title:	HEAP-BASED MECHANISM FOR EFFICIENT GARBAGE COLLECTION BLOCK SELECTION

Patent #:	8918583	Issue Dt:	12/23/2014	Application #:	13722845	Filing Dt:	12/20/2012
Publication #:	US20140181363	Pub Dt:	06/26/2014
Title:	ADAPTING BEHAVIOR OF SOLID-STATE DRIVE USING REAL USAGE MODEL

Patent #:	9305655	Issue Dt:	04/05/2016	Application #:	14038749	Filing Dt:	09/27/2013
Publication #:	US20150092487	Pub Dt:	04/02/2015
Title:	SOLVING MLC NAND PAIRED PAGE PROGRAM USING REDUCED SPATIAL REDUNDANCY

Assignor

Exec Dt:

05/10/2019

Assignee

875 THIRD AVENUE

NEW YORK, NEW YORK 10022

Correspondence name and address
	S. KAREFF C/O SCHULTE ROTH & ZABEL LLP
	919 THIRD AVENUE
	25TH FLOOR
	NEW YORK, NY 10022

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