Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 009375/0519 | |
| Pages: | 9 |
| | Recorded: | 05/15/1998 | | |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
7
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Patent #:
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Issue Dt:
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10/26/1993
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Application #:
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07928922
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Filing Dt:
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08/11/1992
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Title:
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USE OF A CLEAN UP STEP TO FORM MORE VERTICAL PROFILES OF POLYCRYSTALLINE SILICON SIDEWALLS DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/14/1993
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Application #:
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07942707
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Filing Dt:
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09/09/1992
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Title:
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FOUR POLY EPROM PROCESS AND STRUCTURE COMPRISING A CONDUCTIVE SOURCE LINE STRUCTURE AND SELF-ALIGNED POLYCRYSTALLINE SILICON DIGIT LINES
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Patent #:
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Issue Dt:
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04/26/1994
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Application #:
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07968086
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Filing Dt:
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10/27/1992
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Title:
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FEATURE FOR A SEMICONDUCTOR DEVICE TO REDUCE MOBILE ION CONTAMINATION
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08091953
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Filing Dt:
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07/15/1993
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Title:
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MODULAR DESIGN FOR AN IC TESTING BURN-IN OVEN
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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08092295
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Filing Dt:
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07/15/1993
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Title:
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METHOD OF FORMING A SELF-ALIGNED LOW DENSITY DRAIN INVERTED THIN FILM TRANSISTOR
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Patent #:
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Issue Dt:
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06/14/1994
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Application #:
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08104230
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Filing Dt:
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08/10/1993
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Title:
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HIGH ACCURACY VIA FORMATION FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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02/20/1996
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Application #:
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08209584
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Filing Dt:
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03/11/1994
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Title:
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METHOD OF FORMING A CONTACT USING A TRENCH AND AN INSULATION LAYER DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
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Assignee
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| 8000 S. FEDERAL WAY |
| BOISE, IDAHO 83706 |
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Correspondence name and address
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MICRON TECHNOLOGY INC.
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KEVIN D. MARTIN
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PATENT DEPT., MAIL STOP 525
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8000 S. FEDERAL WAY
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BOISE, IDAHO 83706-9632
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