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Reel/Frame:015942/0521   Pages: 22
Recorded: 11/02/2004
Conveyance: SECURITY AGREEMENT
Total properties: 338
Page 3 of 4
Pages: 1 2 3 4
1
Patent #:
Issue Dt:
05/13/2003
Application #:
09615670
Filing Dt:
07/14/2000
Title:
MICROCIRCUIT DIE-SAWING PROTECTOR
2
Patent #:
Issue Dt:
10/29/2002
Application #:
09620444
Filing Dt:
07/20/2000
Title:
SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR DIES AND BOND WIRES
3
Patent #:
Issue Dt:
07/23/2002
Application #:
09631449
Filing Dt:
08/02/2000
Title:
SEMICONDUCTOR CHIP HAVING A RADIO-FREQUENCY IDENTIFICATION TRANSCEIVER
4
Patent #:
Issue Dt:
09/03/2002
Application #:
09634496
Filing Dt:
08/08/2000
Title:
D-SORBITOL DEHYDROGENASE GENE
5
Patent #:
Issue Dt:
09/28/2004
Application #:
09648284
Filing Dt:
08/24/2000
Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
6
Patent #:
Issue Dt:
10/22/2002
Application #:
09648946
Filing Dt:
08/23/2000
Title:
CIRCUIT BOARD FOR SEMICONDUCTOR PACKAGE
7
Patent #:
Issue Dt:
06/18/2002
Application #:
09654978
Filing Dt:
09/05/2000
Title:
WAFER LEVEL PRODUCTION OF CHIP SIZE SEMICONDUCTOR PACKAGES
8
Patent #:
Issue Dt:
06/10/2003
Application #:
09655439
Filing Dt:
09/05/2000
Title:
CHIP SIZE SEMICONDUCTOR PACKAGES WITH STACKED DIES
9
Patent #:
Issue Dt:
09/23/2003
Application #:
09656253
Filing Dt:
09/06/2000
Title:
SEMICONDUCTOR MEMORY CARDS AND METHOD OF MAKING SAME
10
Patent #:
Issue Dt:
04/22/2003
Application #:
09659017
Filing Dt:
09/08/2000
Title:
MULTIPLE DIE LEAD FRAME PACKAGE WITH ENHANCED DIE-TO DIE INTERCONNECT ROUTING USING INTERNAL LEAD TRACE WIRING
11
Patent #:
Issue Dt:
02/18/2003
Application #:
09670499
Filing Dt:
09/26/2000
Title:
MICROMACHINE STACKED WIREBONDED PACKAGE
12
Patent #:
Issue Dt:
10/28/2003
Application #:
09670500
Filing Dt:
09/26/2000
Title:
MICROMACHINE STACKED WIREBONDED PACKAGE FABRICATION METHOD
13
Patent #:
Issue Dt:
03/11/2003
Application #:
09670501
Filing Dt:
09/26/2000
Title:
MICROMACHINE STACKED FLIP CHIP PACKAGE FABRICATION METHOD
14
Patent #:
Issue Dt:
02/25/2003
Application #:
09687049
Filing Dt:
10/13/2000
Title:
SEMICONDUCTOR DEVICE HAVING INCREASED MOISTURE PATH AND INCREASED SOLDER JOINT STRENGTH
15
Patent #:
Issue Dt:
09/09/2003
Application #:
09687126
Filing Dt:
10/13/2000
Title:
APPARATUS FOR MANUFACTURING SEMICONDUCTOR PACKAGES
16
Patent #:
Issue Dt:
09/30/2003
Application #:
09687331
Filing Dt:
10/13/2000
Title:
LEADFRAME FOR SEMICONDUCTOR PACKAGE AND MOLD FOR MOLDING THE SAME
17
Patent #:
Issue Dt:
12/31/2002
Application #:
09687485
Filing Dt:
10/13/2000
Title:
SEMICONDUCTOR PACKAGE HAVING INCREASED SOLDER JOINT STRENGTH
18
Patent #:
Issue Dt:
01/13/2004
Application #:
09687487
Filing Dt:
10/13/2000
Title:
CLAMP AND HEAT BLOCK ASSEMBLY FOR WIRE BONDING A SEMICONDUCTOR PACKAGE ASSEMBLY
19
Patent #:
Issue Dt:
06/22/2004
Application #:
09687495
Filing Dt:
10/13/2000
Title:
ENCAPSULATED SEMICONDUCTOR PACKAGE INCLUDING CHIP PADDLE AND LEADS
20
Patent #:
Issue Dt:
05/04/2004
Application #:
09687530
Filing Dt:
10/13/2000
Title:
STACKABLE SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SAME
21
Patent #:
Issue Dt:
08/12/2003
Application #:
09687531
Filing Dt:
10/13/2000
Title:
STACKABLE SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SAME
22
Patent #:
Issue Dt:
11/05/2002
Application #:
09687532
Filing Dt:
10/13/2000
Title:
METHOD FOR MAKING A SEMICONDUCTOR PACKAGE HAVING IMPROVED DEFECT TESTING AND INCREASED PRODUCTION YIELD
23
Patent #:
Issue Dt:
01/13/2004
Application #:
09687536
Filing Dt:
10/13/2000
Title:
END GRID ARRAY SEMICONDUCTOR PACKAGE
24
Patent #:
Issue Dt:
04/29/2003
Application #:
09687541
Filing Dt:
10/13/2000
Title:
SEMICONDUCTOR PACKAGE LEADFRAME ASSEMBLY AND METHOD OF MANUFACTURE
25
Patent #:
Issue Dt:
02/24/2004
Application #:
09687585
Filing Dt:
10/13/2000
Title:
SEMICONDUCTOR PACKAGE HAVING REDUCED THICKNESS
26
Patent #:
Issue Dt:
11/11/2003
Application #:
09687787
Filing Dt:
10/13/2000
Title:
THIN AND HEAT RADIANT SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING
27
Patent #:
Issue Dt:
10/28/2003
Application #:
09687876
Filing Dt:
10/13/2000
Title:
NEAR CHIP SIZE SEMICONDUCTOR PACKAGE
28
Patent #:
Issue Dt:
01/22/2002
Application #:
09693466
Filing Dt:
10/20/2000
Title:
Method of fabricating semiconductor device
29
Patent #:
Issue Dt:
02/18/2003
Application #:
09703195
Filing Dt:
10/31/2000
Title:
PLASTIC INTEGRATED CIRCUIT DEVICE PACKAGE AND METHOD FOR MAKING THE PACKAGE
30
Patent #:
Issue Dt:
01/21/2003
Application #:
09711993
Filing Dt:
11/13/2000
Title:
CHIP SIZE IMAGE SENSOR IN WIREBOND PACKAGE WITH STEP-UP RING FOR ELECTRICAL CONTACT
31
Patent #:
Issue Dt:
10/07/2003
Application #:
09711994
Filing Dt:
11/13/2000
Title:
CHIP SIZE IMAGE SENSOR BUMPER PACKAGE FABRICATION METHOD
32
Patent #:
Issue Dt:
03/04/2003
Application #:
09712313
Filing Dt:
11/13/2000
Title:
CHIP SIZE IMAGE SENSOR BUMPED PACKAGE
33
Patent #:
Issue Dt:
09/16/2003
Application #:
09712314
Filing Dt:
11/13/2000
Title:
CHIP SIZE IMAGE SENSOR WIREBOND PACKAGE FABRICATION METHOD
34
Patent #:
Issue Dt:
03/11/2003
Application #:
09714622
Filing Dt:
11/16/2000
Title:
ANGULATED SEMICONDUCTOR PACKAGES
35
Patent #:
Issue Dt:
01/29/2002
Application #:
09714682
Filing Dt:
11/15/2000
Title:
Flip chip on glass image sensor package fabrication method
36
Patent #:
Issue Dt:
01/22/2002
Application #:
09730721
Filing Dt:
12/06/2000
Title:
Making semiconductor packages with stacked dies and reinforced wire bonds
37
Patent #:
Issue Dt:
05/20/2003
Application #:
09733148
Filing Dt:
12/07/2000
Title:
EXPOSED COPPER STRAP IN A SEMICONDUCTOR PACKAGE
38
Patent #:
Issue Dt:
11/04/2003
Application #:
09745265
Filing Dt:
12/20/2000
Publication #:
Pub Dt:
05/30/2002
Title:
WIRE BONDING METHOD AND SEMICONDUCTOR PACKAGE MANUFACTURED USING THE SAME
39
Patent #:
Issue Dt:
01/06/2004
Application #:
09751536
Filing Dt:
12/29/2000
Title:
OPTICAL FIBER HAVING TAPERED END AND OPTICAL CONNECTOR WITH RECIPROCAL OPENING
40
Patent #:
Issue Dt:
05/20/2003
Application #:
09752244
Filing Dt:
12/28/2000
Title:
METHOD OF MAKING AND STACKING A SEMICONDUCTOR PACKAGE
41
Patent #:
Issue Dt:
09/10/2002
Application #:
09752662
Filing Dt:
12/28/2000
Title:
SEMICONDUCTOR PACKAGE AND CIRCUIT BOARD FOR MAKING THE PACKAGE
42
Patent #:
Issue Dt:
07/16/2002
Application #:
09754229
Filing Dt:
01/03/2001
Title:
METHOD FOR FORMING A BOND WIRE PRESSURE SENSOR DIE PACKAGE
43
Patent #:
Issue Dt:
08/13/2002
Application #:
09754239
Filing Dt:
01/03/2001
Title:
METHOD FOR FORMING A FLIP CHIP PRESSURE SENSOR DIE PACKAGE
44
Patent #:
Issue Dt:
08/27/2002
Application #:
09754393
Filing Dt:
01/03/2001
Title:
BOND WIRE PRESSURE SENSOR DIE PACKAGE
45
Patent #:
Issue Dt:
02/03/2004
Application #:
09764165
Filing Dt:
01/16/2001
Title:
OPTICAL MODULE WITH LENS INTEGRAL HOLDER
46
Patent #:
Issue Dt:
08/26/2003
Application #:
09764166
Filing Dt:
01/16/2001
Title:
METHOD FOR FABRICATING A SPECIAL-PURPOSE DIE USING A POLYMERIZABLE TAPE
47
Patent #:
Issue Dt:
06/03/2003
Application #:
09764190
Filing Dt:
01/16/2001
Title:
STRUCTURE FOR FABRICATING A SPECIAL-PURPOSE DIE USING A POLYMERIZABLE TAPE
48
Patent #:
Issue Dt:
09/03/2002
Application #:
09770859
Filing Dt:
01/26/2001
Title:
SEMICONDUCTOR MODULE PACKAGE SUBSTRATE
49
Patent #:
Issue Dt:
12/17/2002
Application #:
09770861
Filing Dt:
01/26/2001
Title:
SEMICONDUCTOR MODULE PACKAGE SUBSTRATE FABRICATION METHOD
50
Patent #:
Issue Dt:
07/13/2004
Application #:
09774952
Filing Dt:
01/30/2001
Publication #:
Pub Dt:
06/28/2001
Title:
SEMICONDUCTOR PACKAGE HAVING SEMICONDUCTOR CHIP WITHIN CENTRAL APERTURE OF SUBSTRATE
51
Patent #:
Issue Dt:
11/05/2002
Application #:
09783797
Filing Dt:
02/14/2001
Title:
PRINTED CIRCUIT BOARD FOR SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
52
Patent #:
Issue Dt:
06/04/2002
Application #:
09797756
Filing Dt:
03/01/2001
Title:
METHOD OF SINGULATION USING LASER CUTTING
53
Patent #:
Issue Dt:
07/16/2002
Application #:
09797759
Filing Dt:
03/01/2001
Title:
STRUCTURE INCLUDING ELECTRONIC COMPONENTS SINGULATED USING LASER CUTTING
54
Patent #:
Issue Dt:
09/24/2002
Application #:
09804749
Filing Dt:
03/12/2001
Title:
MICROMIRROR DEVICE PACKAGE
55
Patent #:
Issue Dt:
09/23/2003
Application #:
09804805
Filing Dt:
03/12/2001
Title:
MICROMIRROR DEVICE PACKAGE FABRICATION METHOD
56
Patent #:
Issue Dt:
06/17/2003
Application #:
09811183
Filing Dt:
03/14/2001
Title:
STRUCTURE FOR PROTECTING A MICROMACHINE WITH A CAVITY IN A UV TAPE
57
Patent #:
Issue Dt:
11/26/2002
Application #:
09812426
Filing Dt:
03/19/2001
Title:
SEMICONDUCTOR PACKAGE WITH WARPAGE RESISTANT SUBSTRATE
58
Patent #:
Issue Dt:
04/08/2003
Application #:
09813485
Filing Dt:
03/20/2001
Title:
MOUNTING FOR A PACKAGE CONTAINING A CHIP
59
Patent #:
Issue Dt:
07/06/2004
Application #:
09816599
Filing Dt:
03/23/2001
Publication #:
Pub Dt:
01/02/2003
Title:
SEMICONDUCTOR PACKAGE INCLUDING STACKED CHIPS WITH ALIGNED INPUT/OUTPUT PADS
60
Patent #:
Issue Dt:
07/22/2003
Application #:
09825785
Filing Dt:
04/04/2001
Title:
THERMALLY ENHANCED CHIP SCALE LEAD ON CHIP SEMICONDUCTOR PACKAGE
61
Patent #:
Issue Dt:
03/04/2003
Application #:
09827619
Filing Dt:
04/06/2001
Title:
SEMICONDUCTOR PACKAGE WITH MOLDED SUBSTRATE AND RECESSED INPUT/OUTPUT TERMINALS
62
Patent #:
Issue Dt:
06/29/2004
Application #:
09827791
Filing Dt:
04/06/2001
Title:
MAKING TWO LEAD SURFACE MOUNTING HIGH POWER MICROLEADFRAME SEMICONDUCTOR PACKAGES
63
Patent #:
Issue Dt:
08/05/2003
Application #:
09828046
Filing Dt:
04/06/2001
Title:
MAKING LEADFRAME SEMICONDUCTOR PACKAGES WITH STACKED DIES AND INTERCONNECTING INTERPOSER
64
Patent #:
Issue Dt:
08/20/2002
Application #:
09828396
Filing Dt:
04/06/2001
Title:
MAKING SEMICONDUCTOR DEVICES HAVING STACKED DIES WITH BIASED BACK SURFACES
65
Patent #:
Issue Dt:
09/14/2004
Application #:
09829341
Filing Dt:
04/09/2001
Title:
STACKABLE LEAD FRAME PACKAGE USING EXPOSED INTERNAL LEAD TRACES
66
Patent #:
Issue Dt:
06/17/2003
Application #:
09839284
Filing Dt:
04/20/2001
Title:
HEAT SPREADER WITH SPRING IC PACKAGE
67
Patent #:
Issue Dt:
05/13/2003
Application #:
09839288
Filing Dt:
04/20/2001
Title:
HEAT SPREADER WITH SPRING IC PACKAGE FABRICATION METHOD
68
Patent #:
Issue Dt:
03/04/2003
Application #:
09839305
Filing Dt:
04/20/2001
Title:
VACUUM SEALED PACKAGE FOR SEMICONDUCTOR CHIP
69
Patent #:
Issue Dt:
07/16/2002
Application #:
09839861
Filing Dt:
04/20/2001
Publication #:
Pub Dt:
08/16/2001
Title:
METHOD OF MAKING A PLASTIC PAKAGE FOR AN OPTICAL INTEGRATED CIRCUIT DEVICE
70
Patent #:
Issue Dt:
09/02/2003
Application #:
09848864
Filing Dt:
05/04/2001
Title:
SHIELDED SEMICONDUCTOR LEADFRAME PACKAGE
71
Patent #:
Issue Dt:
03/16/2004
Application #:
09848932
Filing Dt:
05/04/2001
Title:
SHIELDED SEMICONDUCTOR PACKAGE WITH SINGLE-SIDED SUBSTRATE AND METHOD FOR MAKING THE SAME
72
Patent #:
Issue Dt:
09/16/2003
Application #:
09851564
Filing Dt:
05/08/2001
Publication #:
Pub Dt:
01/03/2002
Title:
SHEET RESIN COMPOSITION
73
Patent #:
Issue Dt:
02/03/2004
Application #:
09855244
Filing Dt:
05/14/2001
Title:
MULTI-CHIP SEMICONDUCTOR PACKAGE WITH INTEGRAL SHIELD AND ANTENNA
74
Patent #:
Issue Dt:
07/01/2003
Application #:
09863359
Filing Dt:
05/22/2001
Publication #:
Pub Dt:
03/07/2002
Title:
PLASTIC INTEGRATED CIRCUIT DEVICE PACKAGE HAVING EXPOSED LEAD SURFACE
75
Patent #:
Issue Dt:
08/06/2002
Application #:
09866100
Filing Dt:
05/25/2001
Title:
ACTIVE HEAT SINK FOR COOLING A SEMICONDUCTOR CHIP
76
Patent #:
Issue Dt:
12/30/2003
Application #:
09871993
Filing Dt:
06/04/2001
Publication #:
Pub Dt:
04/25/2002
Title:
IMAGE SENSING COMPONENT PACKAGE AND MANUFACTURE METHOD THEREOF
77
Patent #:
Issue Dt:
10/14/2003
Application #:
09880277
Filing Dt:
06/13/2001
Publication #:
Pub Dt:
01/02/2003
Title:
PERSONALIZED CIRCUIT MODULE PACKAGE AND METHOD FOR PACKAGING CIRCUIT MODULES
78
Patent #:
Issue Dt:
09/30/2003
Application #:
09881343
Filing Dt:
06/13/2001
Title:
HERMETIC CERAMIC SEMICONDUCTOR PACKAGE
79
Patent #:
Issue Dt:
07/09/2002
Application #:
09884357
Filing Dt:
06/18/2001
Title:
METHOD AND APPARATUS FOR ATTACHING MULTIPLE METAL COMPONENTS TO INTEGRATED CIRCUIT MODULES
80
Patent #:
Issue Dt:
12/09/2003
Application #:
09888950
Filing Dt:
06/25/2001
Title:
METHOD OF MAKING A CHIP CARRIER PACKAGE USING LASER ABLATION
81
Patent #:
Issue Dt:
07/20/2004
Application #:
09891678
Filing Dt:
06/25/2001
Title:
OPTICAL TRACK DRAIN PACKAGE
82
Patent #:
Issue Dt:
03/18/2003
Application #:
09895767
Filing Dt:
06/29/2001
Title:
METHOD FOR MOLDING SEMICONDUCTOR PACKAGE HAVING A CERAMIC SUBSTRATE
83
Patent #:
Issue Dt:
04/15/2003
Application #:
09895994
Filing Dt:
06/28/2001
Title:
PRE-DRILLED IMAGE SENSOR PACKAGE
84
Patent #:
Issue Dt:
12/09/2003
Application #:
09895996
Filing Dt:
06/28/2001
Title:
STRUCTURE FOR BACKSIDE SAW CAVITY PROTECTION
85
Patent #:
Issue Dt:
05/11/2004
Application #:
09896014
Filing Dt:
06/28/2001
Title:
METHOD FOR FORMING AN IMAGE SENSOR PACKAGE WITH VISION DIE IN LENS HOUSING
86
Patent #:
Issue Dt:
05/04/2004
Application #:
09896074
Filing Dt:
06/28/2001
Title:
PRE-DRILLED IMAGE SENSOR PACKAGE FABRICATION METHOD
87
Patent #:
Issue Dt:
04/06/2004
Application #:
09906868
Filing Dt:
07/16/2001
Title:
METHOD OF FABRICATING AND USING AN IMAGE SENSOR PACKAGE WITH REFLECTOR
88
Patent #:
Issue Dt:
02/03/2004
Application #:
09906992
Filing Dt:
07/16/2001
Title:
IMAGE SENSOR PACKAGE WITH REFLECTOR
89
Patent #:
Issue Dt:
12/02/2003
Application #:
09909160
Filing Dt:
07/18/2001
Title:
INTEGRATED CIRCUIT CHIP PACKAGE HAVING AN INTERNAL LEAD
90
Patent #:
Issue Dt:
07/01/2003
Application #:
09916716
Filing Dt:
07/26/2001
Title:
REDUCED THICKNESS PACKAGED ELECTRONIC DEVICE
91
Patent #:
Issue Dt:
06/04/2002
Application #:
09916719
Filing Dt:
07/26/2001
Title:
METHOD FOR FORMING A REDUCED THICKNESS PACKAGED ELECTRONIC DEVICE
92
Patent #:
Issue Dt:
11/26/2002
Application #:
09916848
Filing Dt:
07/26/2001
Title:
PRE-DRILLED BALL GRID ARRAY PACKAGE
93
Patent #:
Issue Dt:
06/10/2003
Application #:
09929239
Filing Dt:
08/13/2001
Title:
LASER DEFINED PADS FOR FLIP CHIP ON LEADFRAME PACKAGE
94
Patent #:
Issue Dt:
07/15/2003
Application #:
09929428
Filing Dt:
08/13/2001
Title:
LASER DEFINED PADS FOR FLIP CHIP ON LEADFRAME PACKAGE FABRICATION METHOD
95
Patent #:
Issue Dt:
08/31/2004
Application #:
09931144
Filing Dt:
08/16/2001
Title:
SOLDERABLE INJECTION-MOLDED INTEGRATED CIRCUIT SUBSTRATE AND METHOD THEREFOR
96
Patent #:
Issue Dt:
11/05/2002
Application #:
09932109
Filing Dt:
08/16/2001
Title:
INTEGRATED CIRCUIT PACKAGE INCLUDING PIN AND BARREL INTERCONNECTS
97
Patent #:
Issue Dt:
03/18/2003
Application #:
09932528
Filing Dt:
08/17/2001
Title:
SEMICONDUCTOR PACKAGE HAVING SUBSTRATE WITH LASER-FORMED APERTURE THROUGH SOLDER MASK LAYER
98
Patent #:
Issue Dt:
05/27/2003
Application #:
09934040
Filing Dt:
08/21/2001
Publication #:
Pub Dt:
03/06/2003
Title:
METHOD AND CIRCUIT MODULE PACKAGE FOR AUTOMATED SWITCH ACTUATOR INSERTION
99
Patent #:
Issue Dt:
08/05/2003
Application #:
09946750
Filing Dt:
09/04/2001
Title:
QUICK SEALING GLASS-LIDDED PACKAGE
100
Patent #:
Issue Dt:
07/06/2004
Application #:
09946861
Filing Dt:
09/04/2001
Title:
QUICK SEALING GLASS-LIDDED PACKAGE FABRICATION METHOD
Assignors
1
Exec Dt:
10/27/2004
2
Exec Dt:
10/27/2004
Assignee
1
390 GREENWICH STREET
1345 ENTERPRISE DRIVE
NEW YORK, NEW YORK 10013
Correspondence name and address
TERESA HARINGS
WEIL, GOTSHAL & MANGES LLP
767 5TH AVENUE
NEW YORK, NY 10153

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