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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:037356/0553   Pages: 306
Recorded: 12/21/2015
Conveyance: PATENT RELEASE
Total properties: 5722
Page 34 of 58
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58
1
Patent #:
7065207
Issue Dt:
06/20/2006
Application #:
10660446
Filing Dt:
09/11/2003
Publication #:
US20050058277
Pub Dt:
03/17/2005
Title:
CONTROLLING ATTENUATION DURING ECHO SUPPRESSION
2
Patent #:
7012324
Issue Dt:
03/14/2006
Application #:
10660828
Filing Dt:
09/12/2003
Publication #:
US20050056920
Pub Dt:
03/17/2005
Title:
LEAD FRAME WITH FLAG SUPPORT STRUCTURE
3
Patent #:
7013357
Issue Dt:
03/14/2006
Application #:
10660845
Filing Dt:
09/12/2003
Publication #:
US20050060455
Pub Dt:
03/17/2005
Title:
ARBITER HAVING PROGRAMMABLE ARBITRATION POINTS FOR UNDEFINED LENGTH BURST ACCESSES AND METHOD
4
Patent #:
6954100
Issue Dt:
10/11/2005
Application #:
10660847
Filing Dt:
09/12/2003
Publication #:
US20050057296
Pub Dt:
03/17/2005
Title:
LEVEL SHIFTER
5
Patent #:
6933614
Issue Dt:
08/23/2005
Application #:
10662541
Filing Dt:
09/15/2003
Publication #:
US20040195696
Pub Dt:
10/07/2004
Title:
INTEGRATED CIRCUIT DIE HAVING A COPPER CONTACT AND METHOD THEREFOR
6
Patent #:
6908822
Issue Dt:
06/21/2005
Application #:
10662832
Filing Dt:
09/15/2003
Publication #:
US20050056899
Pub Dt:
03/17/2005
Title:
SEMICONDUCTOR DEVICE HAVING AN INSULATING LAYER AND METHOD FOR FORMING
7
Patent #:
6958265
Issue Dt:
10/25/2005
Application #:
10663621
Filing Dt:
09/16/2003
Publication #:
US20050059213
Pub Dt:
03/17/2005
Title:
SEMICONDUCTOR DEVICE WITH NANOCLUSTERS
8
Patent #:
7074527
Issue Dt:
07/11/2006
Application #:
10668432
Filing Dt:
09/23/2003
Publication #:
US20050064299
Pub Dt:
03/24/2005
Title:
METHOD FOR FABRICATING A MASK USING A HARDMASK AND METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING THE SAME
9
Patent #:
7078785
Issue Dt:
07/18/2006
Application #:
10668694
Filing Dt:
09/23/2003
Publication #:
US20050062130
Pub Dt:
03/24/2005
Title:
SEMICONDUCTOR DEVICE AND MAKING THEREOF
10
Patent #:
6964911
Issue Dt:
11/15/2005
Application #:
10668714
Filing Dt:
09/23/2003
Publication #:
US20050064669
Pub Dt:
03/24/2005
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING ISOLATION REGIONS
11
Patent #:
7030469
Issue Dt:
04/18/2006
Application #:
10670631
Filing Dt:
09/25/2003
Publication #:
US20050067676
Pub Dt:
03/31/2005
Title:
METHOD OF FORMING A SEMICONDUCTOR PACKAGE AND STRUCTURE THEREOF
12
Patent #:
6849515
Issue Dt:
02/01/2005
Application #:
10670634
Filing Dt:
09/25/2003
Title:
SEMICONDUCTOR PROCESS FOR DISPOSABLE SIDEWALL SPACERS AND STRUCTURE
13
Patent #:
7023195
Issue Dt:
04/04/2006
Application #:
10670683
Filing Dt:
09/25/2003
Publication #:
US20040061488
Pub Dt:
04/01/2004
Title:
MODULE, SYSTEM AND METHOD FOR TESTING A PHASE LOCKED LOOP
14
Patent #:
7029980
Issue Dt:
04/18/2006
Application #:
10670928
Filing Dt:
09/25/2003
Publication #:
US20050070056
Pub Dt:
03/31/2005
Title:
METHOD OF MANUFACTURING SOI TEMPLATE LAYER
15
Patent #:
7085943
Issue Dt:
08/01/2006
Application #:
10672161
Filing Dt:
09/26/2003
Publication #:
US20050071693
Pub Dt:
03/31/2005
Title:
METHOD AND CIRCUITRY FOR CONTROLLING SUPPLY VOLTAGE IN A DATA PROCESSING SYSTEM
16
Patent #:
7151387
Issue Dt:
12/19/2006
Application #:
10672487
Filing Dt:
09/26/2003
Publication #:
US20040064772
Pub Dt:
04/01/2004
Title:
ANALYSIS MODULE, INTEGRATED CIRCUIT, SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT
17
Patent #:
6894937
Issue Dt:
05/17/2005
Application #:
10672959
Filing Dt:
09/26/2003
Publication #:
US20050068815
Pub Dt:
03/31/2005
Title:
ACCELERATED LIFE TEST OF MRAM CELLS
18
Patent #:
6917555
Issue Dt:
07/12/2005
Application #:
10675005
Filing Dt:
09/30/2003
Publication #:
US20050068799
Pub Dt:
03/31/2005
Title:
INTEGRATED CIRCUIT POWER MANAGEMENT FOR REDUCING LEAKAGE CURRENT IN CIRCUIT ARRAYS AND METHOD THEREFOR
19
Patent #:
6949455
Issue Dt:
09/27/2005
Application #:
10677070
Filing Dt:
10/01/2003
Publication #:
US20040063285
Pub Dt:
04/01/2004
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE A SEMICONDUCTOR LAYER
20
Patent #:
6919258
Issue Dt:
07/19/2005
Application #:
10677573
Filing Dt:
10/02/2003
Publication #:
US20050073028
Pub Dt:
04/07/2005
Title:
SEMICONDUCTOR DEVICE INCORPORATING A DEFECT CONTROLLED STRAINED CHANNEL STRUCTURE AND METHOD OF MAKING THE SAME
21
Patent #:
7280615
Issue Dt:
10/09/2007
Application #:
10677753
Filing Dt:
10/03/2003
Publication #:
US20040120424
Pub Dt:
06/24/2004
Title:
METHOD FOR MAKING A CLEAR CHANNEL ASSESSMENT IN A WIRELESS NETWORK
22
Patent #:
6831350
Issue Dt:
12/14/2004
Application #:
10677844
Filing Dt:
10/02/2003
Title:
SEMICONDUCTOR STRUCTURE WITH DIFFERENT LATTICE CONSTANT MATERIALS AND METHOD FOR FORMING THE SAME
23
Patent #:
7088702
Issue Dt:
08/08/2006
Application #:
10680489
Filing Dt:
10/08/2003
Publication #:
US20040072573
Pub Dt:
04/15/2004
Title:
METHOD FOR CONTROLLING A DATA STREAM IN A WIRELESS NETWORK
24
Patent #:
7072635
Issue Dt:
07/04/2006
Application #:
10680491
Filing Dt:
10/08/2003
Publication #:
US20040067765
Pub Dt:
04/08/2004
Title:
METHOD FOR COMBINING DATA FROM PHASE INDETERMINATE DATA STREAMS FOR RAKING
25
Patent #:
7292622
Issue Dt:
11/06/2007
Application #:
10680492
Filing Dt:
10/08/2003
Publication #:
US20040066842
Pub Dt:
04/08/2004
Title:
METHOD AND APPARATUS FOR RAKING IN A WIRELESS NETWORK
26
Patent #:
7623894
Issue Dt:
11/24/2009
Application #:
10682746
Filing Dt:
10/09/2003
Publication #:
US20050079889
Pub Dt:
04/14/2005
Title:
CELLULAR MODEM PROCESSING
27
Patent #:
7123892
Issue Dt:
10/17/2006
Application #:
10683493
Filing Dt:
10/10/2003
Publication #:
US20050079838
Pub Dt:
04/14/2005
Title:
ARCHITECTURE FOR AN AM/FM DIGITAL INTERMEDIATE FREQUENCY RADIO
28
Patent #:
7047350
Issue Dt:
05/16/2006
Application #:
10683778
Filing Dt:
10/10/2003
Publication #:
US20050080975
Pub Dt:
04/14/2005
Title:
DATA PROCESSING SYSTEM HAVING A SERIAL DATA CONTROLLER
29
Patent #:
6970336
Issue Dt:
11/29/2005
Application #:
10684112
Filing Dt:
10/10/2003
Publication #:
US20050078419
Pub Dt:
04/14/2005
Title:
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND METHOD OF OPERATION
30
Patent #:
7293153
Issue Dt:
11/06/2007
Application #:
10685561
Filing Dt:
10/14/2003
Publication #:
US20050080949
Pub Dt:
04/14/2005
Title:
METHOD AND SYSTEM FOR DIRECT ACCESS TO A NON-MEMORY MAPPED DEVICE MEMORY
31
Patent #:
7144825
Issue Dt:
12/05/2006
Application #:
10687271
Filing Dt:
10/16/2003
Publication #:
US20050085092
Pub Dt:
04/21/2005
Title:
MULTI-LAYER DIELECTRIC CONTAINING DIFFUSION BARRIER MATERIAL
32
Patent #:
6958261
Issue Dt:
10/25/2005
Application #:
10688228
Filing Dt:
10/14/2003
Publication #:
US20040080029
Pub Dt:
04/29/2004
Title:
OPTICAL SENSOR PACKAGE
33
Patent #:
6986974
Issue Dt:
01/17/2006
Application #:
10688589
Filing Dt:
10/16/2003
Publication #:
US20050084768
Pub Dt:
04/21/2005
Title:
ATTENUATED PHASE SHIFT MASK FOR EXTREME ULTRAVIOLET LITHOGRAPHY AND METHOD THEREFORE
34
Patent #:
7038547
Issue Dt:
05/02/2006
Application #:
10689240
Filing Dt:
10/20/2003
Publication #:
US20050083134
Pub Dt:
04/21/2005
Title:
AMPLIFIER CIRCUIT
35
Patent #:
6902440
Issue Dt:
06/07/2005
Application #:
10690060
Filing Dt:
10/21/2003
Publication #:
US20050085082
Pub Dt:
04/21/2005
Title:
METHOD OF FORMING A LOW K DIELECTRIC IN A SEMICONDUCTOR MANUFACTURING PROCESS
36
Patent #:
6933227
Issue Dt:
08/23/2005
Application #:
10691984
Filing Dt:
10/23/2003
Publication #:
US20050087870
Pub Dt:
04/28/2005
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
37
Patent #:
6933599
Issue Dt:
08/23/2005
Application #:
10694146
Filing Dt:
10/27/2003
Publication #:
US20050087856
Pub Dt:
04/28/2005
Title:
ELECTROMAGNETIC NOISE SHIELDING IN SEMICONDUCTOR PACKAGES USING CAGED INTERCONNECT STRUCTURES
38
Patent #:
6892108
Issue Dt:
05/10/2005
Application #:
10694594
Filing Dt:
10/27/2003
Publication #:
US20040125191
Pub Dt:
07/01/2004
Title:
METHOD FOR ADJUSTING PROCESSING PARAMETERS OF AT LEAST ONE PLATE-SHAPED OBJECT IN A PROCESSING TOOL
39
Patent #:
6951783
Issue Dt:
10/04/2005
Application #:
10695163
Filing Dt:
10/28/2003
Publication #:
US20050101069
Pub Dt:
05/12/2005
Title:
CONFINED SPACERS FOR DOUBLE GATE TRANSISTOR SEMICONDUCTOR FABRICATION PROCESS
40
Patent #:
7041562
Issue Dt:
05/09/2006
Application #:
10696079
Filing Dt:
10/29/2003
Publication #:
US20050093063
Pub Dt:
05/05/2005
Title:
METHOD FOR FORMING MULTIPLE GATE OXIDE THICKNESS UTILIZING ASHING AND CLEANING
41
Patent #:
7146593
Issue Dt:
12/05/2006
Application #:
10700883
Filing Dt:
11/04/2003
Publication #:
US20050097490
Pub Dt:
05/05/2005
Title:
METHOD OF IMPLEMENTING POLISHING UNIFORMITY AND MODIFYING LAYOUT DATA
42
Patent #:
6928005
Issue Dt:
08/09/2005
Application #:
10703657
Filing Dt:
11/05/2003
Publication #:
US20050105324
Pub Dt:
05/19/2005
Title:
DOMINO COMPARATOR CAPABLE FOR USE IN A MEMORY ARRAY
43
Patent #:
7171526
Issue Dt:
01/30/2007
Application #:
10703924
Filing Dt:
11/07/2003
Publication #:
US20050102444
Pub Dt:
05/12/2005
Title:
MEMORY CONTROLLER USEABLE IN A DATA PROCESSING SYSTEM
44
Patent #:
7394866
Issue Dt:
07/01/2008
Application #:
10705120
Filing Dt:
11/12/2003
Publication #:
US20040156445
Pub Dt:
08/12/2004
Title:
ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE PULSE FORMATION
45
Patent #:
7098502
Issue Dt:
08/29/2006
Application #:
10705317
Filing Dt:
11/10/2003
Publication #:
US20050098822
Pub Dt:
05/12/2005
Title:
TRANSISTOR HAVING THREE ELECTRICALLY ISOLATED ELECTRODES AND METHOD OF FORMATION
46
Patent #:
6831310
Issue Dt:
12/14/2004
Application #:
10705504
Filing Dt:
11/10/2003
Title:
INTEGRATED CIRCUIT HAVING MULTIPLE MEMORY TYPES AND METHOD OF FORMATION
47
Patent #:
6958548
Issue Dt:
10/25/2005
Application #:
10716655
Filing Dt:
11/19/2003
Publication #:
US20050104193
Pub Dt:
05/19/2005
Title:
SEMICONDUCTOR DEVICE WITH MAGNETICALLY PERMEABLE HEAT SINK
48
Patent #:
6867078
Issue Dt:
03/15/2005
Application #:
10716955
Filing Dt:
11/19/2003
Title:
METHOD FOR FORMING A MICROWAVE FIELD EFFECT TRANSISTOR WITH HIGH OPERATING VOLTAGE
49
Patent #:
6939767
Issue Dt:
09/06/2005
Application #:
10716956
Filing Dt:
11/19/2003
Publication #:
US20050106812
Pub Dt:
05/19/2005
Title:
MULTI-BIT NON-VOLATILE INTEGRATED CIRCUIT MEMORY AND METHOD THEREFOR
50
Patent #:
7262105
Issue Dt:
08/28/2007
Application #:
10718892
Filing Dt:
11/21/2003
Publication #:
US20050112829
Pub Dt:
05/26/2005
Title:
SEMICONDUCTOR DEVICE WITH SILICIDED SOURCE/DRAINS
51
Patent #:
7240041
Issue Dt:
07/03/2007
Application #:
10721196
Filing Dt:
11/25/2003
Publication #:
US20050108943
Pub Dt:
05/26/2005
Title:
NETWORK MESSAGE PROCESSING USING INVERSE PATTERN MATCHING
52
Patent #:
7613775
Issue Dt:
11/03/2009
Application #:
10721201
Filing Dt:
11/25/2003
Publication #:
US20050111446
Pub Dt:
05/26/2005
Title:
NETWORK MESSAGE FILTERING USING HASHING AND PATTERN MATCHING
53
Patent #:
7346098
Issue Dt:
03/18/2008
Application #:
10721950
Filing Dt:
11/25/2003
Publication #:
US20050111530
Pub Dt:
05/26/2005
Title:
COMMUNICATION RECEIVER
54
Patent #:
NONE
Issue Dt:
Application #:
10722998
Filing Dt:
11/26/2003
Publication #:
US20040107322
Pub Dt:
06/03/2004
Title:
System and method for dynamically allocating shared memory within a multiple function device
55
Patent #:
7500152
Issue Dt:
03/03/2009
Application #:
10728398
Filing Dt:
12/05/2003
Publication #:
US20050138484
Pub Dt:
06/23/2005
Title:
APPARATUS AND METHOD FOR TIME ORDERING EVENTS IN A SYSTEM HAVING MULTIPLE TIME DOMAINS
56
Patent #:
6969656
Issue Dt:
11/29/2005
Application #:
10728621
Filing Dt:
12/05/2003
Publication #:
US20050124120
Pub Dt:
06/09/2005
Title:
METHOD AND CIRCUIT FOR MULTIPLYING SIGNALS WITH A TRANSISTOR HAVING MORE THAN ONE INDEPENDENT GATE STRUCTURE
57
Patent #:
7039883
Issue Dt:
05/02/2006
Application #:
10728622
Filing Dt:
12/05/2003
Publication #:
US20050125757
Pub Dt:
06/09/2005
Title:
DERIVATION OF CIRCUIT BLOCK CONSTRAINTS
58
Patent #:
6998952
Issue Dt:
02/14/2006
Application #:
10729531
Filing Dt:
12/05/2003
Publication #:
US20050122198
Pub Dt:
06/09/2005
Title:
INDUCTIVE DEVICE INCLUDING BOND WIRES
59
Patent #:
7403966
Issue Dt:
07/22/2008
Application #:
10730174
Filing Dt:
12/08/2003
Publication #:
US20050125479
Pub Dt:
06/09/2005
Title:
HARDWARE FOR PERFORMING AN ARITHMETIC FUNCTION
60
Patent #:
7585744
Issue Dt:
09/08/2009
Application #:
10730230
Filing Dt:
12/08/2003
Publication #:
US20050124089
Pub Dt:
06/09/2005
Title:
METHOD OF FORMING A SEAL FOR A SEMICONDUCTOR DEVICE
61
Patent #:
7272178
Issue Dt:
09/18/2007
Application #:
10730387
Filing Dt:
12/08/2003
Publication #:
US20050123036
Pub Dt:
06/09/2005
Title:
METHOD AND APPARATUS FOR CONTROLLING THE BANDWIDTH FREQUENCY OF AN ANALOG FILTER
62
Patent #:
7599432
Issue Dt:
10/06/2009
Application #:
10730449
Filing Dt:
12/08/2003
Publication #:
US20050123033
Pub Dt:
06/09/2005
Title:
METHOD AND APPARATUS FOR DYNAMICALLY INSERTING GAIN IN AN ADAPTIVE FILTER SYSTEM
63
Patent #:
7215972
Issue Dt:
05/08/2007
Application #:
10731069
Filing Dt:
12/09/2003
Publication #:
US20050122166
Pub Dt:
06/09/2005
Title:
ADAPTIVE TRANSMIT POWER CONTROL SYSTEM
64
Patent #:
7056766
Issue Dt:
06/06/2006
Application #:
10731831
Filing Dt:
12/09/2003
Publication #:
US20050124147
Pub Dt:
06/09/2005
Title:
LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME
65
Patent #:
7450665
Issue Dt:
11/11/2008
Application #:
10731850
Filing Dt:
12/09/2003
Publication #:
US20050123072
Pub Dt:
06/09/2005
Title:
METHOD AND APPARATUS TO IMPLEMENT DC OFFSET CORRECTION IN A SIGMA DELTA CONVERTER
66
Patent #:
6953738
Issue Dt:
10/11/2005
Application #:
10734435
Filing Dt:
12/12/2003
Publication #:
US20050127442
Pub Dt:
06/16/2005
Title:
METHOD AND APPARATUS FOR FORMING AN SOI BODY-CONTACTED TRANSISTOR
67
Patent #:
7096348
Issue Dt:
08/22/2006
Application #:
10736393
Filing Dt:
12/15/2003
Publication #:
US20050132173
Pub Dt:
06/16/2005
Title:
METHOD AND APPARATUS FOR ALLOCATING ENTRIES IN A BRANCH TARGET BUFFER
68
Patent #:
7205235
Issue Dt:
04/17/2007
Application #:
10736395
Filing Dt:
12/15/2003
Publication #:
US20050130419
Pub Dt:
06/16/2005
Title:
METHOD FOR REDUCING CORROSION OF METAL SURFACES DURING SEMICONDUCTOR PROCESSING
69
Patent #:
6903004
Issue Dt:
06/07/2005
Application #:
10736853
Filing Dt:
12/16/2003
Publication #:
US20050130405
Pub Dt:
06/16/2005
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING A LOW K DIELECTRIC
70
Patent #:
7050354
Issue Dt:
05/23/2006
Application #:
10737058
Filing Dt:
12/16/2003
Publication #:
US20050128836
Pub Dt:
06/16/2005
Title:
LOW-POWER COMPILER-PROGRAMMABLE MEMORY WITH FAST ACCESS TIMING
71
Patent #:
7037857
Issue Dt:
05/02/2006
Application #:
10737115
Filing Dt:
12/16/2003
Publication #:
US20050130359
Pub Dt:
06/16/2005
Title:
METHOD FOR ELIMINATION OF EXCESSIVE FIELD OXIDE RECESS FOR THIN SI SOI
72
Patent #:
6846716
Issue Dt:
01/25/2005
Application #:
10737116
Filing Dt:
12/16/2003
Publication #:
US20040124450
Pub Dt:
07/01/2004
Title:
INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
73
Patent #:
6894540
Issue Dt:
05/17/2005
Application #:
10738433
Filing Dt:
12/17/2003
Title:
GLITCH REMOVAL CIRCUIT
74
Patent #:
6943289
Issue Dt:
09/13/2005
Application #:
10738815
Filing Dt:
12/17/2003
Publication #:
US20050133233
Pub Dt:
06/23/2005
Title:
SLOTTED PLANAR POWER CONDUCTOR
75
Patent #:
7630457
Issue Dt:
12/08/2009
Application #:
10739505
Filing Dt:
12/18/2003
Publication #:
US20050135511
Pub Dt:
06/23/2005
Title:
METHOD AND APPARATUS FOR DEMODULATING A RECEIVED SIGNAL WITHIN A CODED SYSTEM
76
Patent #:
7132303
Issue Dt:
11/07/2006
Application #:
10739605
Filing Dt:
12/18/2003
Publication #:
US20050136558
Pub Dt:
06/23/2005
Title:
STACKED SEMICONDUCTOR DEVICE ASSEMBLY AND METHOD FOR FORMING
77
Patent #:
6976110
Issue Dt:
12/13/2005
Application #:
10740157
Filing Dt:
12/18/2003
Publication #:
US20050138255
Pub Dt:
06/23/2005
Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Filing Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Application #:
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Filing Dt:
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Title:
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Publication #:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
METHOD AND APPARATUS FOR PROCESSING A FREQUENCY MODULATED (FM) SIGNAL USING AN ADAPTIVE EQUALIZER
Assignor
1
CITIBANK, N.A., AS COLLATERAL AGENT
Exec Dt:
12/07/2015
Assignee
1
FREESCALE SEMICONDUCTOR, INC.
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TEXAS 78735
Correspondence name and address
IP RESEARCH PLUS, INC.
21 TADCASTER CIRCLE
ATTN: PENELOPE J.A. AGODOA
WALDORF, MD 20602

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