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Patent Assignment Details

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Reel/Frame:	020645/0553			Pages:	25
		Recorded:	03/13/2008
Attorney Dkt #:	LS
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 15

Patent #:	6014038	Issue Dt:	01/11/2000	Application #:	08821475	Filing Dt:	03/21/1997
Title:	FUNCTION BLOCK ARCHITECTURE FOR GATE ARRAY

Patent #:	6223313	Issue Dt:	04/24/2001	Application #:	08985790	Filing Dt:	12/05/1997
Title:	METHOD AND APPARATUS FOR CONTROLLING AND OBSERVING DATA IN A LOGIC BLOCK-BASED ASIC

Patent #:	6498361	Issue Dt:	12/24/2002	Application #:	09140087	Filing Dt:	08/26/1998
Title:	DESIGN INFORMATION MEMORY FOR CONFIGURABLE INTEGRATED CIRCUITS

Patent #:	6770949	Issue Dt:	08/03/2004	Application #:	09144489	Filing Dt:	08/31/1998
Title:	ONE-MASK CUSTOMIZABLE PHASE-LOCKED LOOP

Patent #:	6690194	Issue Dt:	02/10/2004	Application #:	09414697	Filing Dt:	10/07/1999
Title:	FUNCTION BLOCK ARCHITECTURE FOR GATE ARRAY

Patent #:	6694491	Issue Dt:	02/17/2004	Application #:	09512783	Filing Dt:	02/25/2000
Title:	PROGRAMMABLE LOGIC ARRAY EMBEDDED IN MASK-PROGRAMMED ASIC

Patent #:	7055125	Issue Dt:	05/30/2006	Application #:	09827015	Filing Dt:	04/05/2001
Publication #:	US20020059555	Pub Dt:	05/16/2002
Title:	DEPOPULATED PROGRAMMABLE LOGIC ARRAY

Patent #:	6611932	Issue Dt:	08/26/2003	Application #:	10056686	Filing Dt:	01/24/2002
Publication #:	US20020073369	Pub Dt:	06/13/2002
Title:	METHOD AND APPARATUS FOR CONTROLLING AND OBSERVING DATA IN A LOGIC BLOCK-BASED ASIC

Patent #:	6680626	Issue Dt:	01/20/2004	Application #:	10161931	Filing Dt:	06/05/2002
Publication #:	US20030227299	Pub Dt:	12/11/2003
Title:	HIGH SPEED DIFFERENTIAL RECEIVER

Patent #:	7770144	Issue Dt:	08/03/2010	Application #:	10447465	Filing Dt:	05/28/2003
Publication #:	US20040243966	Pub Dt:	12/02/2004
Title:	MODULAR ARRAY DEFINED BY STANDARD CELL LOGIC

Patent #:	7102237	Issue Dt:	09/05/2006	Application #:	10447466	Filing Dt:	05/28/2003
Title:	ASIC CUSTOMIZATION WITH PREDEFINED VIA MASK

Patent #:	6804812	Issue Dt:	10/12/2004	Application #:	10458892	Filing Dt:	06/10/2003
Publication #:	US20030212979	Pub Dt:	11/13/2003
Title:	DEPOPULATED PROGRAMMABLE LOGIC ARRAY

Patent #:	6954917	Issue Dt:	10/11/2005	Application #:	10460343	Filing Dt:	06/11/2003
Publication #:	US20030214324	Pub Dt:	11/20/2003
Title:	FUNCTION BLOCK ARCHITECTURE FOR GATE ARRAY AND METHOD FOR FORMING AN ASIC

Patent #:	7043713	Issue Dt:	05/09/2006	Application #:	10640171	Filing Dt:	08/12/2003
Publication #:	US20040049759	Pub Dt:	03/11/2004
Title:	IMPLEMENTING PROGRAMMABLE LOGIC ARRAY EMBEDDED IN MASK - PROGRAMMED ASIC

Assignor

Exec Dt:

02/08/2006

Assignee

3255 SCOTT BLVD., STE. 2-102

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	WALSTEIN BENNETT SMITH III
	P.O. BOX 1668
	GEORGETOWN, TX 78627

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