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Patent Assignment Details
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Reel/Frame:015279/0556   Pages: 32
Recorded: 10/12/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 317
Page 4 of 4
Pages: 1 2 3 4
1
Patent #:
Issue Dt:
08/07/2001
Application #:
09318388
Filing Dt:
05/25/1999
Title:
METHOD FOR CELL SWAPPING TO IMPROVE PRE-LAYOUT TO POST-LAYOUT TIMING
2
Patent #:
Issue Dt:
05/01/2001
Application #:
09322967
Filing Dt:
05/28/1999
Title:
BONDING OF SILICON WAFERS
3
Patent #:
Issue Dt:
03/21/2000
Application #:
09388333
Filing Dt:
09/02/1999
Title:
AUTOMATED WASHING SYSTEM AND METHOD
4
Patent #:
Issue Dt:
02/18/2003
Application #:
09618991
Filing Dt:
07/18/2000
Title:
INTEGRATED CIRCUIT DEVICE COMPRISING LOW DIELECTRIC CONSTANT MATERIAL FOR REDUCED CROSS TALK
5
Patent #:
Issue Dt:
09/10/2002
Application #:
09694993
Filing Dt:
10/23/2000
Title:
INTEGRATED CIRCUIT DEVICE WITH LOW DIELECTRIC CONSTANT MATERIAL COMPRISING GLASS RESIN
6
Patent #:
Issue Dt:
02/18/2003
Application #:
09695020
Filing Dt:
10/23/2000
Title:
LOW DIELECTRIC CONSTANT MATERIAL IN INTEGRATED CIRCUIT
7
Patent #:
Issue Dt:
01/07/2003
Application #:
09695598
Filing Dt:
10/23/2000
Title:
INTEGRATED CIRCUIT DEVICE WITH REDUCED CROSS TALK
8
Patent #:
Issue Dt:
12/03/2002
Application #:
09703767
Filing Dt:
11/01/2000
Title:
SEA-OF-CELLS ARRAY OF TRANSISTORS
9
Patent #:
Issue Dt:
01/06/2004
Application #:
09703948
Filing Dt:
10/31/2000
Title:
METHOD OF CONSTRUCTING AN INTEGRATED CIRCUIT COMPRISING AN EMBEDDED MACRO
10
Patent #:
Issue Dt:
08/12/2003
Application #:
09704115
Filing Dt:
11/01/2000
Title:
SEA-OF-CELLS ARRAY OF TRANSISTORS
11
Patent #:
Issue Dt:
04/29/2003
Application #:
09726879
Filing Dt:
11/30/2000
Publication #:
Pub Dt:
03/15/2001
Title:
DIGITIZER STYLUS CONTAINING HANDWRITING DATA
12
Patent #:
Issue Dt:
03/23/2004
Application #:
09777264
Filing Dt:
02/05/2001
Publication #:
Pub Dt:
11/08/2001
Title:
ARCHITECTURE AND CONFIGURING METHOD FOR A COMPUTER EXPANSION BOARD
13
Patent #:
NONE
Issue Dt:
Application #:
10099754
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
10/03/2002
Title:
Integrated circuit I/O pad cell modeling
14
Patent #:
Issue Dt:
12/20/2005
Application #:
10125925
Filing Dt:
04/19/2002
Publication #:
Pub Dt:
10/24/2002
Title:
SEA-OF-CELLS ARRAY OF TRANSISTORS
15
Patent #:
Issue Dt:
09/13/2005
Application #:
10428592
Filing Dt:
05/01/2003
Publication #:
Pub Dt:
10/30/2003
Title:
BI-CMOS INTEGRATED CIRCUIT
16
Patent #:
Issue Dt:
08/14/2007
Application #:
10463160
Filing Dt:
06/16/2003
Publication #:
Pub Dt:
02/26/2004
Title:
SEA-OF-CELLS ARRAY OF TRANSISTORS
17
Patent #:
Issue Dt:
11/22/2005
Application #:
10601351
Filing Dt:
06/23/2003
Publication #:
Pub Dt:
01/08/2004
Title:
SEA-OF-CELLS ARRAY OF TRANSISTORS
Assignor
1
Exec Dt:
09/20/2004
Assignee
1
SAN 136-1, AMI-RI, BUBAL-EUB, ICHON-SHI
KYOUNGKI 467-860, KOREA, REPUBLIC OF
Correspondence name and address
BLAKELY, SOKOLOFF, TAYLOR & ZAFMAN
ERIC S. HYMAN
12400 WILSHIRE BOULEVARD
SEVENTH FLOOR
LOS ANGELES, CA 90025

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