Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 031001/0558 | |
| Pages: | 4 |
| | Recorded: | 08/13/2013 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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05/10/1994
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Application #:
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08021573
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Filing Dt:
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02/24/1993
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Title:
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PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT DEVICE BY FORMING A PLANARIZED POLYSILAZANE LAYER AND OXIDIZING TO FORM OXIDE LAYER
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08193747
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Filing Dt:
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02/09/1994
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Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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03/05/1996
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Application #:
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08299117
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Filing Dt:
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09/02/1994
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Title:
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FLIP-FLOP CIRCUIT
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08653973
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Filing Dt:
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05/28/1996
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Title:
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LEVEL CONVERTER FOR CMOS 3V TO FROM 5V
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Patent #:
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Issue Dt:
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06/23/1998
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Application #:
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08886018
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Filing Dt:
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06/30/1997
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Title:
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PROCESS FOR FORMING SILICON DIOXIDE FILM
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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08939923
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Filing Dt:
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09/29/1997
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Title:
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PROCESS FOR FORMING SILICON DIOXIDE FILM
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Assignee
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| 2-10-23, SHIN-YOKOHAMA, KOHOKU-KU, |
| YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033 |
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Correspondence name and address
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KRATZ, QUINTOS & HANSON, LLP
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4TH FLOOR
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1420 K STREET, N.W.
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WASHINGTON, DC 20005
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