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Patent #:
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Issue Dt:
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09/17/1996
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Application #:
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07963583
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Filing Dt:
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10/20/1992
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Title:
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PREFETCH/PRESTORE MECHANISM FOR PERIPHERAL CONTROLLERS WITH SHARED INTERNAL BUS
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Patent #:
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Issue Dt:
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03/24/1998
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Application #:
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07963584
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Filing Dt:
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10/20/1992
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Title:
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SCSI HOST ADAPTER WITH SHARED COMMAND AND DATA BUFFER
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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07964532
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Filing Dt:
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10/15/1992
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Title:
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A PROGAMMABLY CONFIGURABLE HOST ADAPTER INTEGRATED CIRCUIT INCLUDING A RISC PROCESSOR
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Patent #:
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Issue Dt:
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08/06/1996
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Application #:
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08029910
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Filing Dt:
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03/11/1993
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Title:
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INTERFACE AND CONTROL CIRCUIT FOR REGULATING DATA FLOW IN A SCSI INITIATOR WITH MULTIPLE HOST BUS INTERFACE SELECTION
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Patent #:
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Issue Dt:
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05/27/1997
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Application #:
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08205002
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Filing Dt:
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03/01/1994
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Title:
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SYSTEM FOR STARTING AND COMPLETING A DATA TRANSFER FOR A SUBSEQUENTLY RECEIVED AUTOTRANSFER COMMAND AFTER RECEIVING A FIRST SCSI DATA TRANSFER COMMAND THAT IS NOT AUTOTRANSFER
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Patent #:
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Issue Dt:
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04/02/1996
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Application #:
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08205003
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Filing Dt:
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03/01/1994
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Title:
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SCSI COMMAND DESCRIPTOR BLOCK PARSING STATE MACHINE
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08229864
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Filing Dt:
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04/19/1994
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Title:
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SCSI HOST ADAPTER INTEGRATED CIRCUIT UTILIZING A SEQUENCER CIRCUIT TO CONTROL AT LEAST ONE NON-DATA SCSI PHASE WITHOUT USE OF ANY PROCESSOR
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Patent #:
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Issue Dt:
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10/08/1996
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Application #:
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08269463
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Filing Dt:
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06/30/1994
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Title:
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METHOD FOR ACCESSING A SEQUENCER CONTROL BLOCK BY A HOST ADAPTER INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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06/24/1997
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Application #:
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08270858
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Filing Dt:
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07/05/1994
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Title:
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GLOBAL PARITY SYMBOL FOR INTERLEAVED REED-SOLOMON CODED DATA
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08301458
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Filing Dt:
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09/07/1994
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Title:
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STATUS INDICATOR FOR A HOST ADAPTER
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08392442
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Filing Dt:
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02/22/1995
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Title:
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ERROR GENERATION CIRCUIT FOR TESTING A DIGITAL BUS
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Patent #:
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Issue Dt:
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06/17/1997
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Application #:
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08462719
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Filing Dt:
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06/05/1995
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Title:
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SYSTEM FOR GENERATING SECOND INTERRUPT SIGNAL FOR DATA TRANSFER COMPLETION FOR A FIRST SCSI DATA TRANSFER COMMAND THAT IS NOT AUTOTRANSFER
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Patent #:
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Issue Dt:
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12/01/1998
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Application #:
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08463333
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Filing Dt:
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06/05/1995
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Title:
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SYSTEM FOR SUPPLYING INITIATOR IDENTIFICATION INFORMATION TO SCSI BUS IN A RESELECTION PHASE OF AN INITIATOR BEFORE COMPLETION OF AN AUTOTRANSFER COMMAND
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Patent #:
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Issue Dt:
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05/12/1998
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Application #:
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08463617
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Filing Dt:
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06/05/1995
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Title:
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METHOD FOR RECEIVING A FIRST SCSI COMMAND, SUBSEQUENT RECEIVING SECOND SCSI COMMAND AND STARTING DATA TRANSFER, RECONNECTING AND PERFORMING DATA TRANSFER FOR FIRST SCSI COMMAND
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Patent #:
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Issue Dt:
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02/11/1997
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Application #:
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08463649
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Filing Dt:
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06/05/1995
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Title:
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METHOD OF FLAGGING THE COMPLETION OF A SECOND COMMAND BEFORE THE COMPLETION OF A FIRST COMMAND FROM THE SAME INITIATOR IN A SCSI CONTROLLER
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08465075
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Filing Dt:
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06/05/1995
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Title:
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SYSTEM FOR STORING INITIATOR, QUEUE TAG AND LOGICAL BLOCK INFORMATION, DISCONNECTING FROM TARGET IF COMMAND IS NOT AUTO TRANSFER, RECONNECTING AND PERFORMING DATA TRANSFER
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Patent #:
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Issue Dt:
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10/20/1998
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Application #:
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08482529
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Filing Dt:
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06/07/1995
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Title:
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INTEGRATED CIRCUIT WITH A SERIAL PORT HAVING ONLY ONE PIN
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08486084
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Filing Dt:
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06/07/1995
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Title:
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A DESKEW CIRCUIT IN A HOST INTERFACE CIRCUIT
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Patent #:
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Issue Dt:
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11/17/1998
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Application #:
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08486096
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Filing Dt:
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06/07/1995
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Title:
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A METHOD OF OPERATION OF A HOST ADAPTER INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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09/29/1998
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Application #:
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08503078
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Filing Dt:
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07/14/1995
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Title:
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METHOD AND APPARATUS FOR IMPLEMENTING AN APPLICATION PROGRAMMING INTERFACE FOR A COMMUNICATIONS BUS
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Patent #:
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Issue Dt:
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11/25/1997
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Application #:
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08532919
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Filing Dt:
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09/22/1995
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Title:
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PRESERVING CONFIGURATION INFORMATION IN A SCAM BASED SCSI SYSTEM
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08592800
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Filing Dt:
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01/26/1996
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Title:
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A SERIAL PORT HAVING ONLY A SINGLE TERMINAL FOR INFORMATION TRANSFER TO AND FROM AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08615476
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Filing Dt:
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03/15/1996
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Title:
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METHOD FOR SPECIFYING CONCURRENT EXECUTION OF A STRING OF I/O COMMAND BLOCKS IN A CHAIN STRUCTURE
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08615477
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Filing Dt:
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03/15/1996
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Title:
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HOST ADAPTER SYSTEM INCLUDING AN INTEGRATED PCI BUFFER CONTROLLER AND XOR FUNCTION CIRCUIT
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08615478
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Filing Dt:
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03/15/1996
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Title:
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HARDWARE METHOD FOR VERIFYING THAT AN AREA OF MEMORY HAS ONLY ZERO VALUES
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08615479
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Filing Dt:
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03/15/1996
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Title:
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METHOD FOR CONCURRENTLY EXECUTING A CONFIGURED STRING OF CONCURRENT I/O COMMAND BLOCKS WITHIN A CHAIN CONCURRENTLY TO PERFORM A RAID 5 I/O OPERATION
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08616817
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Filing Dt:
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03/15/1996
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Title:
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CHAIN MANAGER FOR USE IN EXECUTING A CHAIN OF I/O COMMAND BLOCKS
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08616836
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Filing Dt:
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03/15/1996
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Title:
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METHOD FOR SPECIFYING EXECUTION OF ONLY ONE OF A PAIR OF I/O COMMAND BLOCKS IN A CHAIN STRUCTURE
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Patent #:
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Issue Dt:
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05/26/1998
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Application #:
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08616838
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Filing Dt:
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03/15/1996
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Title:
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METHOD FOR ENHANCING PERFORMANCE OF A RAID 1 READ OPERATION USING A PAIR OF I/O COMMAND BLOCKS IN A CHAIN STRUCTURE
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08616846
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Filing Dt:
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03/15/1996
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Title:
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I/O COMMAND BLOCK CHAIN STRUCTURE IN A MEMORY
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08617990
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Filing Dt:
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03/15/1996
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Title:
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METHOD FOR SEQUENCING EXECUTION OF I/O COMMAND BLOCKS IN A CHAIN STRUCTURE BY SETTING HOLD-OFF FLAGS AND CONFIGURING A COUNTER IN EACH I/O COMMAND BLOCK
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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08617991
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Filing Dt:
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03/15/1996
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Title:
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A METHOD OF ENABLING AND DISABLING A DATA FUNCTION IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/16/1999
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Application #:
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08687009
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Filing Dt:
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07/16/1996
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Title:
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GLOBAL PARITY SYMBOL FOR INTERLEAVED REED-SOLOMON CODED DATA
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Patent #:
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|
Issue Dt:
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11/02/1999
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Application #:
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08797802
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Filing Dt:
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02/07/1997
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Title:
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ERROR GENERATION CIRCUIT FOR TESTING A DIGITAL BUS
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Patent #:
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|
Issue Dt:
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08/31/1999
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Application #:
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08808526
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Filing Dt:
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02/28/1997
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Title:
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INTERLEAVED BURST XOR USING A SINGLE MEMORY POINTER
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Patent #:
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Issue Dt:
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04/20/1999
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Application #:
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08829044
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Filing Dt:
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03/31/1997
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Title:
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SHIFT REGISTER-BASED XOR ACCUMULATOR ENGINE FOR GENERATING PARITY IN A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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08829432
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Filing Dt:
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03/31/1997
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Title:
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WRITE SYNCHRONIZATION SYSTEM ON A HEADERLESS FORMAT MAGNETIC DISK DEVICE
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Patent #:
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|
Issue Dt:
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12/14/1999
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Application #:
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08866427
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Filing Dt:
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05/30/1997
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Title:
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METHODS AND APPARATUSES FOR AUTOMATIC BANK SWITCHING IN A HOST ADAPTER MEMORY
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Patent #:
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|
Issue Dt:
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01/04/2000
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Application #:
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08872019
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Filing Dt:
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06/10/1997
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Title:
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EXTERNAL I/O CONTROLLER SYSTEM FOR AN INDEPENDENT ACCESS PARITY DISK ARRAY
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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08876539
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Filing Dt:
|
06/09/1997
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|
Title:
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STATUS INDICATOR FOR A HOST ADAPTER
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Patent #:
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|
Issue Dt:
|
05/09/2000
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Application #:
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08882170
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Filing Dt:
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06/25/1997
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Title:
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FULL ENCLOSURE CHASSIS SYSTEM WITH TOOL-FREE ACCESS TO HOT-PLUGGABLE CIRCUIT BOARDS THEREIN
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Patent #:
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|
Issue Dt:
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08/29/2000
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Application #:
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08887349
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Filing Dt:
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07/02/1997
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Title:
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HIGH-SPEED SERIAL DATA CABLE WITH IMPROVED ELECTROMAGNETIC PERFORMANCE
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Patent #:
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|
Issue Dt:
|
08/03/1999
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Application #:
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08906369
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Filing Dt:
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08/05/1997
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|
Title:
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COMMAND INTERPRETER SYSTEM IN AN I/O CONTROLLER
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Patent #:
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Issue Dt:
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05/18/1999
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Application #:
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08906765
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Filing Dt:
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08/05/1997
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Title:
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SYSTEM FOR COPYING IOBS FROM FIFO INTO I/O ADAPTER, WRITING DATA COMPLETED IOB, AND INVALIDATING COMPLETED IOB IN FIFO FOR REUSE OF FIFO
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Patent #:
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|
Issue Dt:
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02/08/2000
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Application #:
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08926303
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Filing Dt:
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09/05/1997
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Title:
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METHOD AND APPARATUS FOR DETERMINING SECTOR ADDRESSES FROM MEDIA HAVING DATA WRITTEN IN A HEADERLESS FORMAT
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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08938828
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Filing Dt:
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09/29/1997
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Title:
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APPARATUS AND METHOD FOR COMMUNICATION BETWEEN INTEGRATED CIRCUITS CONNECTED TO EACH OTHER BY A SINGLE LINE
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Patent #:
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|
Issue Dt:
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10/26/1999
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Application #:
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08942373
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Filing Dt:
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10/02/1997
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|
Title:
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INTEGRATED PCI BUFFER CONTROLLER AND XOR FUNCTION CIRCUIT
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Patent #:
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|
Issue Dt:
|
05/09/2000
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Application #:
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08963754
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Filing Dt:
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11/04/1997
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Title:
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SYSTEM AND METHOD FOR REAL-TIME DATA BACKUP USING SNAPSHOT COPYING WITH SELECTIVE CAMPACTION OF BACKUP DATA
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Patent #:
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Issue Dt:
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12/28/1999
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Application #:
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08963902
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Filing Dt:
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11/04/1997
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Title:
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FILE ARRAY COMMUNICATIONS INTERFACE FOR COMMUNICATING BETWEEN A HOST COMPUTER AND AN ADAPTER
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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08964304
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Filing Dt:
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11/04/1997
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Title:
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FILE ARRAY STORAGE ARCHITECTURE HAVING FILE SYSTEM DISTRIBUTED ACROSS A DATA PROCESSING PLATFORM
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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08988016
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Filing Dt:
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12/10/1997
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Title:
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COMMAND QUEUING SYSTEM FOR A HARDWARE ACCELERATED COMMAND INTERPRETER ENGINE
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09012267
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Filing Dt:
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01/23/1998
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Title:
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DECENTRALIZED FILE MAPPING IN A STRIPED NETWORK FILE SYSTEM IN A DISTRIBUTED COMPUTING ENVIRONMENT
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Patent #:
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|
Issue Dt:
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08/15/2000
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Application #:
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09016764
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Filing Dt:
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01/30/1998
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Title:
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METHOD FOR SELECTIVELY BOOTING FROM A DESIRED PERIPHERAL DEVICE
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Patent #:
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|
Issue Dt:
|
10/15/2002
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Application #:
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09036615
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Filing Dt:
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03/06/1998
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|
Publication #:
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Pub Dt:
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01/03/2002
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Title:
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METHOD AND SYSTEM FOR MANAGING STORAGE DEVICES OVER A NETWORK
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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09049522
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Filing Dt:
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03/27/1998
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Title:
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DATA TRANSFER BETWEEN SMALL COMPUTER SYSTEM INTERFACE SYSTEMS
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Patent #:
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Issue Dt:
|
03/13/2001
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Application #:
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09055197
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Filing Dt:
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04/03/1998
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Title:
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SERIAL/PARALLEL GHZ TRANSCEIVER WITH PSEUDO-RANDOM BUILT IN SELF TEST PATTERN GENERATOR
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Patent #:
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Issue Dt:
|
03/13/2001
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Application #:
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09062279
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Filing Dt:
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04/17/1998
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|
Title:
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FAULT TOLERANT REDUNDANT BUS BRIDGE SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
|
11/23/1999
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Application #:
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09062282
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Filing Dt:
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04/17/1998
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|
Title:
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REDUNDANT BUS BRIDGE SYSTEMS AND METHODS USING SELECTIVELY SYNCHRONIZED CLOCK SINGALS
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Patent #:
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Issue Dt:
|
09/19/2000
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Application #:
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09078346
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Filing Dt:
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05/13/1998
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|
Title:
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BUS TERMINATION CIRCUITRY AND METHODS FOR IMPLEMENTING THE SAME
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Patent #:
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Issue Dt:
|
08/15/2000
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Application #:
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09083569
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Filing Dt:
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05/22/1998
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Title:
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SCATTER GATHER MEMORY SYSTEM FOR A HARDWARE ACCELERATED COMMAND INTERPRETER ENGINE
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Patent #:
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Issue Dt:
|
01/09/2001
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Application #:
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09085671
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Filing Dt:
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05/27/1998
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Title:
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SCSI BUS TRANSCEIVER AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
|
12/05/2000
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Application #:
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09088812
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Filing Dt:
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06/02/1998
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Title:
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SOURCE-DESTINATION RE-TIMED COOPERATIVE COMMUNICATION BUS
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09089030
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Filing Dt:
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06/02/1998
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Title:
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HOST ADAPTER HAVING A SNAPSHOT MECHANISM
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09089039
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Filing Dt:
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06/02/1998
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Title:
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SYSTEM FOR DATA STREAM PACKER AND UNPACKER INTEGRATED CIRCUIT WHICH ALIGN DATA STORED IN A TWO LEVEL LATCH
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09089044
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Filing Dt:
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06/02/1998
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Title:
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MULTIPLE ACCESS MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09089057
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Filing Dt:
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06/02/1998
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Title:
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DECOUPLED SERIAL MEMORY ACCESS WITH PASSKEY PROTECTED MEMORY AREAS
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09089274
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Filing Dt:
|
06/02/1998
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Title:
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HOST ADAPTER CAPABLE OF SIMULTANEOUSLY TRANSMITTING AND RECEIVING DATA OF MULTIPLE CONTEXTS BETWEEN A COMPUTER BUS AND PERIPHERAL BUS
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09089311
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Filing Dt:
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06/02/1998
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Title:
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A HOST ADAPTER HAVING PAGED DATA BUFFERS FOR CONTINUOUSLY TRANSFERRING DATA BETWEEN A SYSTEM BUS AND A PERIPHERAL BUS
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09097899
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Filing Dt:
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06/16/1998
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Title:
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BROADCAST COMMAND PACKET PROTOCOL FOR SCSI INTERFACE
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Patent #:
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Issue Dt:
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05/02/2000
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Application #:
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09098214
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Filing Dt:
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06/16/1998
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Title:
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QUICK ARBITRATION AND SELECT (QAS) PROTOCOL IN SCSI INTERFACE FOR CONFIGURING A CURRENT TARGET DEVICE TO ASSERT A QAS MESSAGE CODE DURING A MESSAGE-IN PHASE
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09130196
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Filing Dt:
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08/05/1998
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Title:
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METHODS OF AND APPARATUS FOR MONITORING THE TERMINATION STATUS OF A SCSI BUS
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09130322
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Filing Dt:
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08/07/1998
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Title:
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DATA ALIGNMENT SYSTEM FOR A HARDWARE ACCELERATED COMMAND INTERPRETER ENGINE
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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09133736
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Filing Dt:
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08/13/1998
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Title:
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BBS ONE BIOS IMAGE MULTICARD SUPPORT
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09134760
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Filing Dt:
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08/14/1998
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Title:
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METHOD AND APPARATUS OF BOOT DEVICE SWITCHING BY A FLOPPY DISK
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09181712
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Filing Dt:
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10/28/1998
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Title:
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INTELLIGENT INPUT/OUTPUT TARGET DEVICE COMMUNICATION AND EXCEPTION HANDLING
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09191943
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Filing Dt:
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11/13/1998
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Title:
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DATA FAULT TOLERANCE SOFTWARE APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09205142
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Filing Dt:
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12/03/1998
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Title:
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METHOD FOR SPECIFYING CONCURRENT EXECUTION OF A STRING OF I/O COMMAND BLOCKS IN A CHAIN STRUCTURE
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09250657
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Filing Dt:
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02/16/1999
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Title:
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RAID ARCHITECTURE WITH TWO-DRIVE FAULT TOLERANCE
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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09255406
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Filing Dt:
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02/22/1999
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Title:
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ERROR GENERATION CIRCUIT FOR TESTING A DIGITAL BUS
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Patent #:
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Issue Dt:
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07/26/2005
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Application #:
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09261708
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Filing Dt:
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03/03/1999
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Title:
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COMPUTER SYSTEM STORAGE
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09273401
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Filing Dt:
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03/22/1999
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Title:
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AUTOMATIC MULTI-MODE TERMINATION
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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09275727
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Filing Dt:
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03/24/1999
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Title:
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STORAGE AREA NETWORK ADMINISTRATION
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09281715
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Filing Dt:
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03/30/1999
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Title:
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METHOD AND APPARATUS FOR CREATING FORMATTED FAT PARTITIONS WITH A HARD DRIVE HAVING A BIOS-LESS CONTROLLER
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09282919
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Filing Dt:
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03/31/1999
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Title:
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UNIVERSAL OPTION ROM BIOS INCLUDING MULTIPLE OPTION BIOS IMAGES FOR MULTICHIP SUPPORT AND BOOT SEQUENCE FOR USE THEREWITH
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09299688
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Filing Dt:
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04/26/1999
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Title:
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ULTRA THIN AND FLEXIBLE SCSI CABLE AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09300818
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Filing Dt:
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04/27/1999
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Title:
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METHOD AND SYSTEM FOR AUTOMATICALLY DETERMINING MAXIUMUM DATA THROUGHPUT OVER A BUS
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09321329
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Filing Dt:
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05/27/1999
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Title:
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FAST STACK SAVE AND RESTORE SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09324347
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Filing Dt:
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06/02/1999
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Title:
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METHOD FOR FLASHING A READ ONLY MEMORY (ROM) CHIP OF A HOST ADAPTER WITH UPDATED OPTION ROM BIOS CODE
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09340539
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Filing Dt:
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06/28/1999
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Title:
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MULTIPLE CHIP SINGLE IMAGE BIOS
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09343324
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Filing Dt:
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06/30/1999
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Publication #:
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Pub Dt:
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01/16/2003
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Title:
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A SCSI PHASE STATUS REGISTER FOR USE IN REDUCING INSTRUCTIONS EXECUTED BY AN ON-CHIP SEQUENCER IN ASSERTING A SCSI ACKOWLEDGE SIGNAL AND METHOD
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09344291
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Filing Dt:
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06/30/1999
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Title:
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HARDWARE ATTENTION MANAGEMENT CIRCUIT AND METHOD FOR PARALLEL SCSI HOST ADAPTERS
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09354426
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Filing Dt:
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07/16/1999
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Title:
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DUAL-DRIVE FAULT TOLERANT METHOD AND SYSTEM FOR ASSIGNING DATA CHUNKS TO COLUMN PARITY SETS
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09375909
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Filing Dt:
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08/17/1999
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Title:
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SELF-HEALING COMPUTER SYSTEM STORAGE
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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09376773
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Filing Dt:
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08/17/1999
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Title:
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OBJECT ORIENTED FAULT TOLERANCE
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09389954
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Filing Dt:
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09/03/1999
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Title:
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HOST-MEMORY BASED RAID SYSTEM, DEVICE, AND METHOD
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09439440
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Filing Dt:
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11/15/1999
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Title:
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SELF-HEALING COMPUTER SYSTEM STORAGE
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09455301
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Filing Dt:
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12/06/1999
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Title:
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METHOD OF CONSERVING MEMORY RESOURCES BY DIRECTLY DECOMPRESSING A COMPRESSED BIOS ASSOCIATED WITH AN OPTION ROM BIOS CHIP TO AN ALLOCATED CONVENTIONAL MEMORY OF SYSTEM MEMORY
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09464127
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Filing Dt:
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12/16/1999
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Title:
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SYSTEM AND METHOD FOR PARITY CACHING BASED ON STRIPE LOCKING IN RAID DATA STORAGE
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|
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09464250
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Filing Dt:
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12/16/1999
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Title:
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SYSTEM AND METHOD FOR DATA STORAGE ARCHIVE BIT UPDATE AFTER SNAPSHOT BACKUP
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09465057
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Filing Dt:
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12/16/1999
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Title:
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SYSTEM AND METHOD FOR ACCOMPLISHING DATA STORAGE MIGRATION BETWEEN RAID LEVELS
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