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Total properties:
11
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Patent #:
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Issue Dt:
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12/15/2020
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Application #:
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16292530
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Filing Dt:
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03/05/2019
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Publication #:
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Pub Dt:
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09/12/2019
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Title:
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MONITORING ACCESSES TO A REGION OF AN INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
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04/13/2021
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Application #:
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16380439
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Filing Dt:
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04/10/2019
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Publication #:
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Pub Dt:
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10/15/2020
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Title:
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PERFORMANCE PROFILING FOR A MULTITHREADED PROCESSOR
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Patent #:
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Issue Dt:
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05/09/2023
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Application #:
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16528394
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Filing Dt:
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07/31/2019
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Publication #:
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Pub Dt:
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03/19/2020
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Title:
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Error Detection Within An Integrated Circuit Chip
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Patent #:
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Issue Dt:
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01/11/2022
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Application #:
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16696812
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Filing Dt:
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11/26/2019
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Publication #:
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Pub Dt:
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05/27/2021
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Title:
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Monitoring Processors Operating in Lockstep
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Patent #:
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Issue Dt:
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02/20/2024
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Application #:
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16850100
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Filing Dt:
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04/16/2020
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Publication #:
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Pub Dt:
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10/22/2020
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Title:
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GENERATION OF TRACE MESSAGES INCLUDING AN INSTRUCTION RETIREMENT COUNT AND A STALL COUNT
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Patent #:
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Issue Dt:
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05/21/2024
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Application #:
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16925445
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Filing Dt:
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07/10/2020
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Publication #:
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Pub Dt:
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01/14/2021
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Title:
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Handling Trace Data for Jumps in Program Flow
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Patent #:
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Issue Dt:
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08/09/2022
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Application #:
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16940960
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Filing Dt:
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07/28/2020
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Publication #:
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Pub Dt:
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02/04/2021
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Title:
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Emulating Broadcast in a Network on Chip
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Patent #:
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Issue Dt:
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08/09/2022
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Application #:
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16994030
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Filing Dt:
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08/14/2020
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Publication #:
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Pub Dt:
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02/18/2021
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Title:
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Routing Messages in an Integrated Circuit Chip Device Using a Crosslinked Tree Structure
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Patent #:
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Issue Dt:
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11/16/2021
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Application #:
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16994373
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Filing Dt:
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08/14/2020
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Publication #:
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Pub Dt:
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02/18/2021
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Title:
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RECONFIGURING AN ADDRESSING MECHANISM FOR A SYSTEM ON CHIP TO BYPASS A DEFECTIVE BRANCH UNIT
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Patent #:
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Issue Dt:
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08/30/2022
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Application #:
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16994444
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Filing Dt:
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08/14/2020
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Publication #:
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Pub Dt:
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02/18/2021
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Title:
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BROADCASTING EVENT MESSAGES IN A SYSTEM ON CHIP USING A CROSSLINKED TREE STRUCTURE
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Patent #:
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Issue Dt:
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07/18/2023
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Application #:
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17064594
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Filing Dt:
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10/06/2020
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Publication #:
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Pub Dt:
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04/08/2021
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Title:
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MESSAGE MONITORING
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