Patent Assignment Details
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| Reel/Frame: | 012157/0579 | |
| Pages: | 2 |
| | Recorded: | 09/07/2001 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09947392
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Filing Dt:
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09/07/2001
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Publication #:
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Pub Dt:
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04/04/2002
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND BIT LINE ISOLATION GATE ARRANGEMENT METHOD THEREOF
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Assignee
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| 416 MAETAN-DONG, PALDAL-GU |
| SUWON-CITY, KYUNGKI-DO, KOREA, REPUBLIC OF |
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Correspondence name and address
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THE LAW OFFICES OF EUGENE M. LEE
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EUGENE M. LEE
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2111 WILSON BOULEVARD, SUITE 1200
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ARLINGTON, VA 22201
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