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Reel/Frame:048947/0592   Pages: 12
Recorded: 04/19/2019
Attorney Dkt #:ZII-RPXC041919
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 38
1
Patent #:
6111584
Issue Dt:
08/29/2000
Application #:
08657945
Filing Dt:
06/04/1996
Title:
RENDERING SYSTEM WITH MINI-PATCH RETRIEVAL FROM LOCAL TEXTURE STORAGE
2
Patent #:
7215344
Issue Dt:
05/08/2007
Application #:
09133741
Filing Dt:
08/13/1998
Publication #:
US20020030693
Pub Dt:
03/14/2002
Title:
TRIANGLE CLIPPING FOR 3D GRAPHICS
3
Patent #:
6253261
Issue Dt:
06/26/2001
Application #:
09176594
Filing Dt:
10/21/1998
Title:
DMA SYSTEM FOR CONTIUING TRANSFERRING ADDITIONAL DATA WHEN REQUESTED TO AVOID AN ADDITIONAL SET UP TIME
4
Patent #:
6977649
Issue Dt:
12/20/2005
Application #:
09280250
Filing Dt:
03/29/1999
Title:
3D GRAPHICS RENDERING WITH SELECTIVE READ SUSPEND
5
Patent #:
6313845
Issue Dt:
11/06/2001
Application #:
09345678
Filing Dt:
06/30/1999
Title:
METHOD AND APPARATUS FOR TRANSPORTING INFORMATION TO A GRAPHIC ACCELERATOR CARD
6
Patent #:
7518616
Issue Dt:
04/14/2009
Application #:
09353887
Filing Dt:
07/15/1999
Title:
GRAPHICS PROCESSOR WITH TEXTURE MEMORY ALLOCATION SYSTEM
7
Patent #:
6181355
Issue Dt:
01/30/2001
Application #:
09354083
Filing Dt:
07/15/1999
Title:
GRAPHICS PROCESSING WITH TRANSCENDENTAL FUNCTION GENERATOR
8
Patent #:
7710425
Issue Dt:
05/04/2010
Application #:
09591225
Filing Dt:
06/09/2000
Title:
GRAPHIC MEMORY MANAGEMENT WITH INVISIBLE HARDWARE-MANAGED PAGE FAULTING
9
Patent #:
7050061
Issue Dt:
05/23/2006
Application #:
09591226
Filing Dt:
06/09/2000
Title:
AUTONOMOUS ADDRESS TRANSLATION IN GRAPHIC SUBSYSTEM
10
Patent #:
6587113
Issue Dt:
07/01/2003
Application #:
09591228
Filing Dt:
06/09/2000
Title:
TEXTURE CACHING WITH CHANGE OF UPDATE RULES AT LINE END
11
Patent #:
6650333
Issue Dt:
11/18/2003
Application #:
09591229
Filing Dt:
06/09/2000
Title:
MULTI-POOL TEXTURE MEMORY MANAGEMENT
12
Patent #:
6677952
Issue Dt:
01/13/2004
Application #:
09591230
Filing Dt:
06/09/2000
Title:
TEXTURE DOWNLOAD DMA CONTROLLER SYNCHING MULTIPLE INDEPENDENTLY-RUNNING RASTERIZERS
13
Patent #:
6683615
Issue Dt:
01/27/2004
Application #:
09591231
Filing Dt:
06/09/2000
Title:
DOUBLY-VIRTUALIZED TEXTURE MEMORY
14
Patent #:
7061500
Issue Dt:
06/13/2006
Application #:
09591532
Filing Dt:
06/09/2000
Title:
DIRECT-MAPPED TEXTURE CACHING WITH CONCISE TAGS
15
Patent #:
6744438
Issue Dt:
06/01/2004
Application #:
09591533
Filing Dt:
06/09/2000
Title:
TEXTURE CACHING WITH BACKGROUND PRELOADING
16
Patent #:
6677954
Issue Dt:
01/13/2004
Application #:
10010469
Filing Dt:
11/08/2001
Title:
GRAPHICS REQUEST BUFFER CACHING METHOD
17
Patent #:
7106323
Issue Dt:
09/12/2006
Application #:
10071895
Filing Dt:
02/08/2002
Publication #:
US20030128204
Pub Dt:
07/10/2003
Title:
RASTERIZER EDGE FUNCTION OPTIMIZATIONS
18
Patent #:
6788303
Issue Dt:
09/07/2004
Application #:
10085466
Filing Dt:
02/27/2002
Publication #:
US20020130874
Pub Dt:
09/19/2002
Title:
VECTOR INSTRUCTION SET
19
Patent #:
6819332
Issue Dt:
11/16/2004
Application #:
10085467
Filing Dt:
02/27/2002
Publication #:
US20020130886
Pub Dt:
09/19/2002
Title:
ANTIALIAS MASK GENERATION
20
Patent #:
6900800
Issue Dt:
05/31/2005
Application #:
10085487
Filing Dt:
02/27/2002
Publication #:
US20020130863
Pub Dt:
09/19/2002
Title:
TILE RELATIVE ORIGIN FOR PLANE EQUATIONS
21
Patent #:
6791559
Issue Dt:
09/14/2004
Application #:
10085976
Filing Dt:
02/28/2002
Publication #:
US20020126126
Pub Dt:
09/12/2002
Title:
PARAMETER CIRCULAR BUFFERS
22
Patent #:
7187383
Issue Dt:
03/06/2007
Application #:
10086980
Filing Dt:
03/01/2002
Publication #:
US20030164830
Pub Dt:
09/04/2003
Title:
YIELD ENHANCEMENT OF COMPLEX CHIPS
23
Patent #:
6950350
Issue Dt:
09/27/2005
Application #:
10117663
Filing Dt:
04/04/2002
Title:
CONFIGURABLE PIPE DELAY WITH WINDOW OVERLAP FOR DDR RECEIVE DATA
24
Patent #:
9098943
Issue Dt:
08/04/2015
Application #:
10903671
Filing Dt:
07/30/2004
Title:
Multiple simultaneous bin sizes
25
Patent #:
8144156
Issue Dt:
03/27/2012
Application #:
10952225
Filing Dt:
09/28/2004
Title:
SEQUENCER WITH ASYNC SIMD ARRAY
26
Patent #:
9218689
Issue Dt:
12/22/2015
Application #:
10952358
Filing Dt:
09/28/2004
Title:
MULTI-SAMPLE ANTIALIASING OPTIMIZATION VIA EDGE TRACKING
27
Patent #:
8643659
Issue Dt:
02/04/2014
Application #:
10958758
Filing Dt:
10/05/2004
Title:
SHADER WITH GLOBAL AND INSTRUCTION CACHES
28
Patent #:
8223157
Issue Dt:
07/17/2012
Application #:
11005522
Filing Dt:
12/06/2004
Title:
STOCHASTIC SUPER SAMPLING OR AUTOMATIC ACCUMULATION BUFFERING
29
Patent #:
9041834
Issue Dt:
05/26/2015
Application #:
13622977
Filing Dt:
09/19/2012
Publication #:
US20140078347
Pub Dt:
03/20/2014
Title:
Systems and Methods for Reducing Noise in Video Streams
30
Patent #:
10162642
Issue Dt:
12/25/2018
Application #:
14172839
Filing Dt:
02/04/2014
Publication #:
US20140354646
Pub Dt:
12/04/2014
Title:
SHADER WITH GLOBAL AND INSTRUCTION CACHES
31
Patent #:
9615039
Issue Dt:
04/04/2017
Application #:
14716336
Filing Dt:
05/19/2015
Publication #:
US20150256772
Pub Dt:
09/10/2015
Title:
Systems and Methods for Reducing Noise in Video Streams
32
Patent #:
9349215
Issue Dt:
05/24/2016
Application #:
14815860
Filing Dt:
07/31/2015
Title:
MULTIPLE SIMULTANEOUS BIN SIZES
33
Patent #:
9406168
Issue Dt:
08/02/2016
Application #:
14976918
Filing Dt:
12/21/2015
Title:
MULTI-SAMPLE ANTIALIASING OPTIMIZATION VIA EDGE TRACKING
34
Patent #:
9990768
Issue Dt:
06/05/2018
Application #:
15162526
Filing Dt:
05/23/2016
Title:
Multiple Simultaneous Bin Sizes
35
Patent #:
9679364
Issue Dt:
06/13/2017
Application #:
15225776
Filing Dt:
08/01/2016
Title:
MULTI-SAMPLE ANTIALIASING OPTIMIZATION VIA EDGE TRACKING
36
Patent #:
NONE
Issue Dt:
Application #:
15476764
Filing Dt:
03/31/2017
Publication #:
US20170280073
Pub Dt:
09/28/2017
Title:
Systems and Methods for Reducing Noise in Video Streams
37
Patent #:
9916643
Issue Dt:
03/13/2018
Application #:
15620708
Filing Dt:
06/12/2017
Title:
MULTI-SAMPLE ANTIALIASING OPTIMIZATION VIA EDGE TRACKING
38
Patent #:
10262459
Issue Dt:
04/16/2019
Application #:
15996463
Filing Dt:
06/02/2018
Title:
MULTIPLE SIMULTANEOUS BIN SIZES
Assignor
1
ZIILABS INC., LTD
Exec Dt:
04/18/2019
Assignee
1
RPX CORPORATION
ONE MARKET PLAZA, STEUART TOWER, SUITE 1100
SAN FRANCISCO, CALIFORNIA 94105
Correspondence name and address
RPX CORPORATION
ONE MARKET PLAZA, STEUART TOWER, SUITE 1100
SAN FRANCISCO, CA 94105

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