Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 046342/0596 | |
| Pages: | 12 |
| | Recorded: | 07/13/2018 | | |
| Attorney Dkt #: | 28744-4804 (161002.1) |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/22/2019
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Application #:
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15840178
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Filing Dt:
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12/13/2017
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Publication #:
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Pub Dt:
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06/28/2018
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Title:
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METHOD OF TREATING SILICON WAFERS TO HAVE INTRINSIC GETTERING AND GATE OXIDE INTEGRITY YIELD
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Assignee
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| 9 BATTERY ROAD #15-1 |
| STRAITS TRADING BUILDING |
| SINGAPORE, SINGAPORE 049910 |
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Correspondence name and address
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RICHARD A. SCHUTH
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ARMSTRONG TEASDALE LLP
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7700 FORSYTH BLVD., SUITE 1800
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ST. LOUIS, MO 63105
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