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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	007194/0606			Pages:	52
		Recorded:	11/07/1994
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 42

Patent #:	3878514	Issue Dt:	04/15/1975	Application #:	05307863	Filing Dt:	11/20/1972
Title:	A LSI PROGRAMMABLE PROCESSOR

Patent #:	3866061	Issue Dt:	02/11/1975	Application #:	05391963	Filing Dt:
Title:	OVERLAP TIMING CONTROL CIRCUIT FOR CONDITIONING SIGNALS IN A SEMICONDU CTOR MEMORY

Patent #:	3980992	Issue Dt:	09/14/1976	Application #:	05527358	Filing Dt:	11/26/1974
Title:	MULTI-MICROPROCESSOR UNIT ON A SINGLE SEMICONDUCTOR CHIP

Patent #:	3953838	Issue Dt:	04/27/1976	Application #:	05537680	Filing Dt:	12/30/1974
Title:	FIFO BUFFER REGISTER MEMORY UTILIZING A ONESHOT DATA TRANSFER SYSTEM

Patent #:	4021788	Issue Dt:	05/03/1977	Application #:	05578094	Filing Dt:	05/16/1975
Title:	CAPACITTOR MEMORY CELL

Patent #:	4031522	Issue Dt:	06/21/1977	Application #:	05594579	Filing Dt:
Title:	ULTRA HIGH SENSITIVITY SENSE AMPLIFIER FOR MEMORIES EMPLOYING SINGLE T RANSISTOR CELLS

Patent #:	4025907	Issue Dt:	05/24/1977	Application #:	05594669	Filing Dt:
Title:	INTERLACED MEMORY MATRIX ARRAY HAVING SINGLE TRANSISTOR CELLS

Patent #:	3970876	Issue Dt:		Application #:	05604705	Filing Dt:
Title:

Patent #:	3997813	Issue Dt:	12/14/1976	Application #:	05630218	Filing Dt:	11/10/1975
Title:	MOS INTEGRATED CIRCUIT CHIP FOR DISPLAY

Patent #:	4038107	Issue Dt:	07/26/1977	Application #:	05637177	Filing Dt:
Title:	METHOD FOR MAKING TRANSISTOR STRUCTURES

Patent #:	4045690	Issue Dt:	08/30/1977	Application #:	05658705	Filing Dt:	02/17/1976
Title:	HIGH SPEED DIFFERENTIAL TO TTL CONVERTER

Patent #:	4040122	Issue Dt:	08/02/1977	Application #:	05674391	Filing Dt:	04/07/1976
Title:	DYNAMIC MEMORY REFRESH METHOD

Patent #:	4125933	Issue Dt:	11/21/1978	Application #:	05792578	Filing Dt:	05/02/1977
Title:	IGFET INTEGRATED CIRCUIT MEMORY CELL

Patent #:	4145702	Issue Dt:		Application #:	05813001	Filing Dt:
Title:

Patent #:	4155118	Issue Dt:	05/15/1979	Application #:	05834928	Filing Dt:	09/20/1977
Title:	ORGANIZATION FOR AN INTEGRATED CIRCUIT CALCULATOR/CONTROLLER

Patent #:	4145623	Issue Dt:		Application #:	05839342	Filing Dt:
Title:

Patent #:	4116720	Issue Dt:	12/26/1978	Application #:	05864247	Filing Dt:	12/27/1977
Title:	METHOD OF MAKING A V-MOSFIELD EFFECT TRANSISTOR FOR DYNAMIC MEMORY CE LL HAVING IMPROVED CAPACITANCE

Patent #:	4199693	Issue Dt:	04/22/1980	Application #:	05875783	Filing Dt:	02/07/1978
Title:	COMPENSATED MOS TIMING NETWORK

Patent #:	4141027	Issue Dt:	02/20/1979	Application #:	05907725	Filing Dt:	05/19/1978
Title:	IGFET INTEGRATED CIRCUIT MEMORY CELL

Patent #:	4281258	Issue Dt:	07/28/1981	Application #:	05958255	Filing Dt:	11/06/1978
Title:	HIGH SPEED, LOW COMPONENT COUNT, CML EXCLUSIVE NOR GATE

Patent #:	4158613	Issue Dt:	06/19/1979	Application #:	05966326	Filing Dt:	12/04/1978
Title:	METHOD OF FORMING A METAL INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS

Patent #:	4401691	Issue Dt:	08/30/1983	Application #:	05970580	Filing Dt:	12/18/1978
Title:	OXIDATION OF SILICON WAFERS TO ELIMINATE WHITE RIBBON

Patent #:	4195358	Issue Dt:	03/25/1980	Application #:	05973175	Filing Dt:	12/26/1978
Title:	DECODER FOR A PROM

Patent #:	4214919	Issue Dt:	07/29/1980	Application #:	05973928	Filing Dt:	12/28/1978
Title:	TECHNIQUE OF GROWING THIN SILICON OXIDE FILMS

Patent #:	4244752	Issue Dt:	01/13/1981	Application #:	06017842	Filing Dt:	03/06/1979
Title:	SINGLE MASK METHOD OF FABRICATING COMPLEMENTARY INTEGRATED CIRCUITS

Patent #:	4262342	Issue Dt:	04/14/1981	Application #:	06053084	Filing Dt:	06/28/1979
Title:	CHARGE RESTORE CIRCUIT FOR SEMICONDUCTOR MEMORIES

Patent #:	4262298	Issue Dt:	04/14/1981	Application #:	06072446	Filing Dt:	09/04/1979
Title:	RAM HAVING A STABILIZED SUBSTRATE BIAS AND LOW-THRESHOLD NARROW-WIDTH TRANSFER GATES

Patent #:	4261763	Issue Dt:	04/14/1981	Application #:	06080618	Filing Dt:	10/01/1979
Title:	FABRICATION OF INTEGRATED CIRCUITS EMPLOYING ONLY ION IMPLANTATION FOR ALL DOPANT LAYERS

Patent #:	4354307	Issue Dt:	10/19/1982	Application #:	06099515	Filing Dt:	12/03/1979
Title:	METHOD FOR MASS PRODUCING MINIATURE FIELD EFFECT TRANSISTORS IN HIGH DENSITY LSI/VLSI CHIPS

Patent #:	4313253	Issue Dt:	02/02/1982	Application #:	06113388	Filing Dt:	01/18/1980
Title:	METHOD OF FABRICATING A CHARGE TRANSFER CHANNEL COVERED BY A STEPPED INSULATING LAYER

Patent #:	4338621	Issue Dt:	07/06/1982	Application #:	06118496	Filing Dt:	02/04/1980
Title:	HERMETIC INTEGRATED CIRCUIT PACKAGE FOR HIGH DENSITY HIGH POWER APPLICATIONS

Patent #:	4381215	Issue Dt:	04/26/1983	Application #:	06153090	Filing Dt:	05/27/1980
Title:	METHOD OF FABRICATING A MISALIGNED, COMPOSITE ELECTRICAL CONTACT ON A SEMICONDUCTOR SUBSTRATE

Patent #:	4296456	Issue Dt:	10/20/1981	Application #:	06155533	Filing Dt:	06/02/1980
Title:	ELECTRONIC PACKAGE FOR HIGH DENSITY INTEGRATED CIRCUITS

Patent #:	4423490	Issue Dt:	12/27/1983	Application #:	06200997	Filing Dt:	10/27/1980
Title:	JFET DYNAMIC MEMORY

Patent #:	4445051	Issue Dt:	04/24/1984	Application #:	06277629	Filing Dt:	06/26/1981
Title:	FIELD EFFECT CURRENT MODE LOGIC GATE

Patent #:	4453212	Issue Dt:	06/05/1984	Application #:	06282919	Filing Dt:	07/13/1981
Title:	EXTENDED ADDRESS GENERATING APPARATUS AND METHOD

Patent #:	4487638	Issue Dt:	12/11/1984	Application #:	06444267	Filing Dt:	11/24/1982
Title:	SEMICONDUCTOR DIE-ATTACH TECHNIQUE AND COMPOSITION THEREFOR

Patent #:	4508977	Issue Dt:	04/02/1985	Application #:	06457175	Filing Dt:	01/11/1983
Title:	RE-PROGRAMMABLE PLA

Patent #:	4532606	Issue Dt:	07/30/1985	Application #:	06513393	Filing Dt:	07/14/1983
Title:	CONTENT ADDRESSABLE MEMORY CELL

Patent #:	4482908	Issue Dt:	11/13/1984	Application #:	06576763	Filing Dt:	01/31/1984
Title:	HIGH CAPACITY MEMORY CELL HAVING A CHARGE TRANSFER CHANNEL COVERED BY A STEPPED INSULATING LAYER

Patent #:	4531144	Issue Dt:	07/23/1985	Application #:	06580291	Filing Dt:	02/21/1984
Title:	ALLUMINUM - REFRACTORY METAL INTERCONNECT W/ANODIZED PERIPHERY

Patent #:	4643935	Issue Dt:	02/17/1987	Application #:	06819995	Filing Dt:	01/21/1986
Title:	EPOXY-GLASS INTEGRATED CIRCUIT PACKAGE HAVING BONDING PADS IN A STEPPED CAVITY

Assignor

SAMSUNG SEMICONDUCTOR AND TELECOMMUNICATIONS, LTD.

Exec Dt:

12/10/1991

Assignee

SAMSUNG ELECTRONICS CO., LTD.

416 MAETAN-DONG PALTAL-GU, SUWON CITY KOREA

SUWON CITY, KOREA, REPUBLIC OF

Correspondence name and address
	HOWREY & SIMON
	THOMAS J. SCOTT, JR.
	1299 PENNSYLVANIA AVE., NW
	WASHINGTON, DC 20004-2402

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