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Patent Assignment Details
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Reel/Frame:017282/0610   Pages: 3
Recorded: 11/30/2005
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
06/10/2008
Application #:
11289428
Filing Dt:
11/30/2005
Publication #:
Pub Dt:
05/31/2007
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING LOW POWER CONSUMPTION WITH SELF-REFRESH
Assignor
1
Exec Dt:
10/28/2005
Assignee
1
11 HINES ROAD
KANATA, ONTARIO, CANADA K2K 2X1
Correspondence name and address
BORDEN LADNER GERVAIS LLP
WORLD EXCHANGE PLAZA
100 QUEEN STREET, SUITE 1100
OTTAWA, ONTARIO K1P 1J9

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