Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 055106/0610 | |
| Pages: | 4 |
| | Recorded: | 01/25/2021 | | |
Attorney Dkt #: | PCUS210002~5 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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04/01/2008
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Application #:
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11056961
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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SCALABLE RECONFIGURABLE PROTOTYPING SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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01/15/2013
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Application #:
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13161061
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Filing Dt:
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06/15/2011
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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LOGIC VERIFICATION MODULE APPARATUS TO SERVE AS A HYPER PROTOTYPE FOR DEBUGGING AN ELECTRONIC DESIGN THAT EXCEEDS THE CAPACITY OF A SINGLE FPGA
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13543854
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Filing Dt:
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07/08/2012
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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VERIFICATION MODULE APPARATUS TO SERVE AS A PROTOTYPE FOR FUNCTIONALLY DEBUGGING AN ELECTRONIC DESIGN THAT EXCEEDS THE CAPACITY OF A SINGLE FPGA
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Patent #:
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Issue Dt:
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05/12/2015
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Application #:
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13714392
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Filing Dt:
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12/13/2012
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Publication #:
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Pub Dt:
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01/09/2014
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Title:
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Verification module apparatus for debugging software and timing of an embedded processor design that exceeds the capacity of a single FPGA
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Assignee
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ROOM 27, 6TH FLOOR, NO. 29&30, LANE 1775, |
QIUSHAN ROAD, SHANGHAI LIN-GANG SPECIAL AREA, |
SHANGHAI, CHINA |
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Correspondence name and address
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BEST INT'L PATENT & TRADEMARK OFFICE (USA)
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P.O. BOX 230970
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CENTREVILLE, VA 20120
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