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Reel/Frame:049018/0616   Pages: 6
Recorded: 04/29/2019
Attorney Dkt #:085097-612176
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 14
1
Patent #:
Issue Dt:
07/19/2016
Application #:
14398753
Filing Dt:
11/04/2014
Publication #:
Pub Dt:
05/21/2015
Title:
METHOD FOR PRODUCING MROM MEMORY BASED ON OTP MEMORY
2
Patent #:
Issue Dt:
12/13/2016
Application #:
14398849
Filing Dt:
11/04/2014
Publication #:
Pub Dt:
04/30/2015
Title:
NOR STRUCTURE FLASH MEMORY AND MANUFACTURING METHOD THEREOF
3
Patent #:
Issue Dt:
01/10/2017
Application #:
14407599
Filing Dt:
12/12/2014
Publication #:
Pub Dt:
05/21/2015
Title:
HIGH VOLTAGE JUNCTION FIELD EFFECT TRANSISTOR
4
Patent #:
Issue Dt:
02/28/2017
Application #:
14411537
Filing Dt:
12/29/2014
Publication #:
Pub Dt:
06/04/2015
Title:
MEMS CHIP AND MANUFACTURING METHOD THEREFOR
5
Patent #:
Issue Dt:
12/01/2015
Application #:
14411550
Filing Dt:
12/29/2014
Publication #:
Pub Dt:
06/11/2015
Title:
SEMICONDUCTOR DEVICE FOR ESD PROTECTION
6
Patent #:
Issue Dt:
06/21/2016
Application #:
14411931
Filing Dt:
12/30/2014
Publication #:
Pub Dt:
05/21/2015
Title:
SILICON ETCHING METHOD
7
Patent #:
Issue Dt:
07/26/2016
Application #:
14651706
Filing Dt:
06/12/2015
Publication #:
Pub Dt:
11/19/2015
Title:
TRENCH DMOS DEVICE WITH REDUCED GATE RESISTANCE AND MANUFACTURING METHOD THEREOF
8
Patent #:
Issue Dt:
09/19/2017
Application #:
14891470
Filing Dt:
11/17/2015
Publication #:
Pub Dt:
04/07/2016
Title:
LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
9
Patent #:
Issue Dt:
04/24/2018
Application #:
14901482
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
12/22/2016
Title:
STARTING CIRCUIT OF POWER MANAGEMENT CHIP, AND POWER MANAGEMENT CHIP
10
Patent #:
Issue Dt:
01/24/2017
Application #:
14902205
Filing Dt:
12/30/2015
Publication #:
Pub Dt:
12/22/2016
Title:
METHOD FOR MANUFACTURING IGBT
11
Patent #:
Issue Dt:
02/28/2017
Application #:
14902220
Filing Dt:
12/30/2015
Publication #:
Pub Dt:
12/22/2016
Title:
METHOD FOR MANUFACTURING INJECTION-ENHANCED INSULATED-GATE BIPOLAR TRANSISTOR
12
Patent #:
Issue Dt:
07/25/2017
Application #:
14902261
Filing Dt:
12/30/2015
Publication #:
Pub Dt:
12/22/2016
Title:
LATERAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTOR
13
Patent #:
Issue Dt:
08/21/2018
Application #:
15022674
Filing Dt:
03/17/2016
Publication #:
Pub Dt:
08/11/2016
Title:
SENSOR CONTROL CIRCUIT AND ELECTRONIC APPARATUS
14
Patent #:
Issue Dt:
09/18/2018
Application #:
15405603
Filing Dt:
01/13/2017
Publication #:
Pub Dt:
05/04/2017
Title:
MANUFACTURING METHOD OF MEMS CHIP
Assignor
1
Exec Dt:
08/22/2017
Assignee
1
NO.8 XINZHOU ROAD
WUXI NEW DISTRICT, JIANGSU, CHINA 214028
Correspondence name and address
POLSINELLI PC
1401 EYE ST NW
SUITE 800
WASHINGTON, DC 20005-2225

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