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Patent Assignment Details
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Reel/Frame:022892/0620   Pages: 5
Recorded: 06/30/2009
Attorney Dkt #:ASSIGNMENTS TO MEDIATEK
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 6
1
Patent #:
Issue Dt:
11/09/1999
Application #:
08863875
Filing Dt:
05/27/1997
Title:
BUS ARRANGEMENTS FOR INTERCONNECTION OF DISCRETE AND/OR INTEGRATED MODULES IN A DIGITAL SYSTEM AND ASSOCIATED METHOD
2
Patent #:
Issue Dt:
12/10/2002
Application #:
08942011
Filing Dt:
10/01/1997
Title:
SYNCHRONOUS LATCHING BUS ARRANGEMENT FOR INTERFACING DISCRETE AND/OR INTEGRATED MODULES IN A DIGITAL SYSTEM AND ASSOCIATED METHOD
3
Patent #:
Issue Dt:
09/12/2000
Application #:
09067584
Filing Dt:
04/27/1998
Title:
PRIORITY ALLOCATION IN A BUS INTERCONNECTED DISCRETE AND/OR INTERGRATED DIGITAL MULTI-MODULE SYSTEM
4
Patent #:
Issue Dt:
07/11/2000
Application #:
09365441
Filing Dt:
08/02/1999
Title:
BUS ARRANGEMENTS FOR INTERCONNECTION OF DISCRETE AND/OR INTEGRATED MODULES IN A DIGITAL SYSTEM AND ASSOCIATED METHOD
5
Patent #:
Issue Dt:
11/20/2001
Application #:
09592364
Filing Dt:
06/12/2000
Title:
Bus arrangements for interconnection of discrete and/or integrated modules in a digital system and associated method
6
Patent #:
Issue Dt:
10/30/2001
Application #:
09619378
Filing Dt:
07/19/2000
Title:
Priority allocation in a bus interconnected discrete and/or integrated digital multi-module system
Assignor
1
Exec Dt:
06/30/2009
Assignee
1
NO. 1 DUSING RD. 1
HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 30078
Correspondence name and address
KLEIN, O'NEILL & SINGH, LLP
43 CORPORATE PARK
SUITE 204
IRVINE, CA 92606

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