Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 022437/0643 | |
| Pages: | 3 |
| | Recorded: | 03/23/2009 | | |
| Attorney Dkt #: | micron.309dv1c1 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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12407615
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Filing Dt:
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03/19/2009
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Publication #:
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Pub Dt:
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10/15/2009
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Title:
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MEMORY ARRAY WITH ULTRA-THIN ETCHED PILLAR SURROUND GATE ACCESS TRANSISTORS AND BURIED DATA/BIT LINES
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Assignee
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| 8000 SOUTH FEDERAL WAY |
| P.O. BOX 6 |
| BOISE, IDAHO 83707-0006 |
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Correspondence name and address
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KNOBBE, MARTENS, OLSON & BEAR, LLP
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2040 MAIN STREET, 14TH FLOOR
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IRVINE, CALIFORNIA 92614
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