Total properties:
48
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
09972579
|
Filing Dt:
|
10/05/2001
|
Publication #:
|
|
Pub Dt:
|
05/23/2002
| | | | |
Title:
|
BRIDGING SYSTEM FOR INTEROPERATION OF REMOTE GROUPS OF DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2010
|
Application #:
|
10023117
|
Filing Dt:
|
12/17/2001
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
Title:
|
CONFIGURABLE DATA PROCESSING DEVICE WITH BIT REORDERING ON INPUTS AND OUTPUTS OF CONFIGURABLE LOGIC FUNCTION BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
10489121
|
Filing Dt:
|
03/10/2004
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
NETWORK WITH SEVERAL SUBNETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10500520
|
Filing Dt:
|
06/29/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
INFORMATION EXCHANGE BETWEEN LOCALLY SYNCHRONOUS CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
10511514
|
Filing Dt:
|
10/14/2004
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
Title:
|
AUTOMATIC TASK DISTRIBUTION IN SCALABLE PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
10515154
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
Title:
|
CONFIGURABLE PROCESSOR WITH MAIN CONTROLLER TO INCREASE ACTIVITY OF AT LEAST ONE OF A PLURALITY OF PROCESSING UNITS HAVING LOCAL PROGRAM COUNTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10530266
|
Filing Dt:
|
04/05/2005
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT COMPRISING A PLURALITY OF PROCESSING MODULES AND A NETWORK AND METHOD FOR EXCHANGING DATA USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
10530267
|
Filing Dt:
|
04/05/2005
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
APPARATUS AND METHOD FOR COMMUNICATING IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2010
|
Application #:
|
10530375
|
Filing Dt:
|
04/06/2005
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
DATA PROCESSING APPARATUS WITH PARALLEL OPERATING FUNCTIONAL UNITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
10530425
|
Filing Dt:
|
04/05/2005
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR ESTABLISHING TRANSACTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
10545642
|
Filing Dt:
|
08/16/2005
|
Publication #:
|
|
Pub Dt:
|
03/30/2006
| | | | |
Title:
|
ELECTRONIC CIRCUIT WITH ARRAY OF PROGRAMMABLE LOGIC CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
10545643
|
Filing Dt:
|
08/16/2005
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
ELECTRONIC CIRCUIT WITH ARRAY OF PROGRAMMABLE LOGIC CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
10545646
|
Filing Dt:
|
08/16/2005
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
TRANSLATION OF A SERIES OF COMPUTER INSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
10547092
|
Filing Dt:
|
08/26/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
POWER MANAGEMENT IN AN IEEE 802.11 IBSS USING AN END OF ATIM FRAME AND A DYNAMICALLY DETERMINED ATIM PERIOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
10549368
|
Filing Dt:
|
09/14/2005
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
PIPELINED INSTRUCTION PROCESSOR WITH DATA BYPASSING AND DISABLING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
10555401
|
Filing Dt:
|
11/02/2005
|
Publication #:
|
|
Pub Dt:
|
11/09/2006
| | | | |
Title:
|
PROCESSING SYSTEM AND METHOD FOR TRANSMITTING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
10555403
|
Filing Dt:
|
11/02/2005
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
PROCESSING SYSTEM AND METHOD FOR TRANSMITTING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
10555747
|
Filing Dt:
|
11/04/2005
|
Publication #:
|
|
Pub Dt:
|
12/07/2006
| | | | |
Title:
|
METHOD FOR DATA SIGNAL TRANSFER ACROSS DIFFERENT CLOCK-DOMAINS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
10555843
|
Filing Dt:
|
11/03/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
PROCESSING SYSTEM AND METHOD FOR COMMUNICATING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
10561454
|
Filing Dt:
|
12/20/2005
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
DATA PROCESSING DEVICE WITH INSTRUCTION CONTROLLED CLOCK SPEED
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
10564654
|
Filing Dt:
|
01/13/2006
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
METHOD TO ACHIEVE FAST ACTIVE SCAN IN 802.11 WLAN
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2011
|
Application #:
|
10569123
|
Filing Dt:
|
02/23/2006
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
ELECTRONIC CIRCUIT WITH PROCESSING UNITS COUPLED VIA A COMMUNICATION NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
10570236
|
Filing Dt:
|
02/28/2006
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
10589114
|
Filing Dt:
|
04/20/2007
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
FIFO MEMORY DEVICE WITH NON-VOLATILE STORAGE STAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
10597543
|
Filing Dt:
|
07/28/2006
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
System and Method for an Ultra Wide-Band Medium Access Control Distributed Reservation Protocol
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
10598299
|
Filing Dt:
|
07/10/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
DATA PROCESSING CIRCUIT WHEREIN DATA PROCESSING UNITS COMMUNICATE VIA A NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
10598552
|
Filing Dt:
|
06/13/2007
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR PACKET SWITCHING CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
10598795
|
Filing Dt:
|
09/12/2006
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD OF COMMUNICATION SERVICE MAPPING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
10599201
|
Filing Dt:
|
09/22/2006
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR TRANSACTION RETRACTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
10599215
|
Filing Dt:
|
09/22/2006
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR TRANSACTION ABORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
10599561
|
Filing Dt:
|
10/02/2006
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
Title:
|
WEIGHT FACTOR BASED ALLOCATION OF TIME SLOT TO USE LINK IN CONNECTION PATH IN NETWORK ON CHIP IC
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
11569083
|
Filing Dt:
|
11/14/2006
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR BUFFERING TO OPTIMIZE BURST LENGTH IN NETWORKS ON CHIPS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2012
|
Application #:
|
11575501
|
Filing Dt:
|
09/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/12/2009
| | | | |
Title:
|
DATA PROCESSING CIRCUIT WHEREIN FUNCTIONAL UNITS SHARE READ PORTS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
11577815
|
Filing Dt:
|
04/09/2008
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
METHOD OF OPERATING A NETWORK NODE OF A NETWORK, A NETWORK NODE, A NETWORK SYSTEM, A COMPUTER-READABLE MEDIUM, AND A PROGRAM ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
11719780
|
Filing Dt:
|
05/21/2007
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
COHERENT CACHING OF LOCAL MEMORY DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11720211
|
Filing Dt:
|
05/25/2007
|
Publication #:
|
|
Pub Dt:
|
01/17/2008
| | | | |
Title:
|
DATA PROCESSING SYSTEM AND METHOD FOR CONVERTING AND SYNCHRONISING DATA TRAFFIC
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
11815981
|
Filing Dt:
|
08/10/2007
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
ENHANCING PERFORMANCE OF A MEMORY UNIT OF A DATA PROCESSING DEVICE BY SEPARATING READING AND FETCHING FUNCTIONALITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
11817057
|
Filing Dt:
|
08/24/2007
|
Publication #:
|
|
Pub Dt:
|
07/10/2008
| | | | |
Title:
|
DATA PROCESSING SYSTEM WITH INTERRUPT CONTROLLER AND INTERRUPT CONTROLLING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
11908965
|
Filing Dt:
|
09/18/2007
|
Publication #:
|
|
Pub Dt:
|
09/04/2008
| | | | |
Title:
|
PROCESSING A DATA ARRAY WITH A MEANDERING SCANNING ORDER USING A CIRCULAR BUFFER MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
11912175
|
Filing Dt:
|
10/22/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH DATA COMMUNICATION NETWORK AND IC DESIGN METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
11914250
|
Filing Dt:
|
11/13/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT AND METHOD OF ARBITRATION IN A NETWORK ON AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
12066673
|
Filing Dt:
|
03/13/2008
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
METHOD AND SYSTEM FOR BUS ARBITRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
12302090
|
Filing Dt:
|
11/24/2008
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
SYSTEM, APPARATUS, AND METHOD TO INDICATE PREFERRED ACCESS POINTS AND SERVICE PROVIDERS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
12521880
|
Filing Dt:
|
07/01/2009
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
WIRELESS COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12817812
|
Filing Dt:
|
06/17/2010
|
Publication #:
|
|
Pub Dt:
|
10/07/2010
| | | | |
Title:
|
METHOD AND SYSTEM FOR BUS ARBITRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2017
|
Application #:
|
12936534
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
02/03/2011
| | | | |
Title:
|
METHOD FOR DISTRIBUTED IDENTIFICATION OF A STATION IN A NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13188051
|
Filing Dt:
|
07/21/2011
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
Title:
|
NETWORK WITH SEVERAL SUBNETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2019
|
Application #:
|
15412502
|
Filing Dt:
|
01/23/2017
|
Publication #:
|
|
Pub Dt:
|
05/11/2017
| | | | |
Title:
|
METHOD FOR DISTRIBUTED IDENTIFICATION, A STATION IN A NETWORK
|
|