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Patent Assignment Details
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Reel/Frame:010630/0685   Pages: 2
Recorded: 08/26/1999
Conveyance: (ASSIGNMENT OF ASSIGNOR'S INTEREST) R-RECORD TO CORRECT THE RECORDATION DATE, 08/14/99 TO 08/26/99 PREVIOUSLY RECORDED AT REEL 10194 FRAME 0827.
Total properties: 1
1
Patent #:
Issue Dt:
01/08/2002
Application #:
09336666
Filing Dt:
06/18/1999
Title:
METHOD AND CIRCUIT FOR MINIMIZING THE CHARGING EFFECT DURING MANUFACTURE OF SEMICONDUCTOR DEVICES
Assignors
1
Exec Dt:
08/01/1999
2
Exec Dt:
08/01/1999
Assignee
1
SOUTH INDUSTRIAL AREA
BEIT TOPPER, 65 HAMELACHA STREET
NETANYA 42504, ISRAEL
Correspondence name and address
DARBY & DARBY P.C.
JOSEPH B. LERCH
805 THIRD AVENUE, 27TH FLOOR
NEW YORK, NEW YORK 10022-7513

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