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Reel/Frame:037222/0690   Pages: 4
Recorded: 12/07/2015
Attorney Dkt #:REXC
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 17
1
Patent #:
Issue Dt:
11/05/2013
Application #:
12748827
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
09/30/2010
Title:
USER EVALUATION APPARATUS DEPENDING ON HARDWARE USAGE STATUS
2
Patent #:
Issue Dt:
10/09/2012
Application #:
12855436
Filing Dt:
08/12/2010
Publication #:
Pub Dt:
02/16/2012
Title:
METHOD AND APPARATUS FOR BURIED WORD LINE FORMATION
3
Patent #:
Issue Dt:
02/19/2013
Application #:
12870612
Filing Dt:
08/27/2010
Publication #:
Pub Dt:
03/01/2012
Title:
SPLIT WORD LINE FABRICATION PROCESS
4
Patent #:
Issue Dt:
10/01/2013
Application #:
12949117
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
11/10/2011
Title:
ROBOT ARM FOR DELIVERING A WAFER AND WAFER-OPERATING MACHINE
5
Patent #:
Issue Dt:
01/22/2013
Application #:
13227315
Filing Dt:
09/07/2011
Title:
THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY WITH AN ANCILLARY ELECTRODE STRUCTURE
6
Patent #:
Issue Dt:
03/25/2014
Application #:
13282905
Filing Dt:
10/27/2011
Publication #:
Pub Dt:
05/02/2013
Title:
DUST COLLECTOR
7
Patent #:
Issue Dt:
03/18/2014
Application #:
13301255
Filing Dt:
11/21/2011
Publication #:
Pub Dt:
05/23/2013
Title:
MANUFACTURING METHOD OF CHARGING CAPACITY STRUCTURE
8
Patent #:
Issue Dt:
05/07/2013
Application #:
13312074
Filing Dt:
12/06/2011
Title:
METHOD OF CONTROLLING A VERTICAL DUAL-GATE DYNAMIC RANDOM ACCESS MEMORY
9
Patent #:
Issue Dt:
12/24/2013
Application #:
13313566
Filing Dt:
12/07/2011
Publication #:
Pub Dt:
06/13/2013
Title:
METHOD OF MANUFACTURING VERTICAL TRANSISTORS
10
Patent #:
Issue Dt:
06/11/2013
Application #:
13327157
Filing Dt:
12/15/2011
Publication #:
Pub Dt:
06/20/2013
Title:
SELF-ALIGNED WET ETCHING PROCESS
11
Patent #:
Issue Dt:
03/25/2014
Application #:
13337810
Filing Dt:
12/27/2011
Publication #:
Pub Dt:
06/27/2013
Title:
VERTICAL TRANSISTOR STRUCTURE AND METHOD OF MANUFACTURING SAME
12
Patent #:
Issue Dt:
02/17/2015
Application #:
13415959
Filing Dt:
03/09/2012
Publication #:
Pub Dt:
09/12/2013
Title:
Semiconductor Device and Method for Making the Same
13
Patent #:
Issue Dt:
12/31/2013
Application #:
13455371
Filing Dt:
04/25/2012
Publication #:
Pub Dt:
10/31/2013
Title:
A SEMICONDUCTOR DEVICE COMPRISING PILLAR ARRAY AND CONTACT ARRAY
14
Patent #:
Issue Dt:
06/25/2013
Application #:
13532293
Filing Dt:
06/25/2012
Title:
ION IMPLANTATION METHOD FOR SEMICONDUCTOR SIDEWALLS
15
Patent #:
Issue Dt:
10/01/2013
Application #:
13551919
Filing Dt:
07/18/2012
Title:
METHOD FOR FABRICATING BURIED BIT LINES
16
Patent #:
Issue Dt:
12/30/2014
Application #:
13609739
Filing Dt:
09/11/2012
Publication #:
Pub Dt:
03/13/2014
Title:
VERTICAL SEMICONDUCTOR CHARGE STORAGE STRUCTURE
17
Patent #:
Issue Dt:
02/23/2016
Application #:
13964949
Filing Dt:
08/12/2013
Publication #:
Pub Dt:
02/12/2015
Title:
DOUBLE-EXPOSURE MASK STRUCTURE AND PHOTOLITHOGRAPHY METHOD THEREOF
Assignor
1
Exec Dt:
11/20/2015
Assignee
1
8000 S. FEDERAL WAY
MS - 1-525
BOISE, IDAHO 83707
Correspondence name and address
MICRON TECHNOLOGY, INC
8000 S. FEDERAL WAY
M/S 1-525
BOISE, ID 83707

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