Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 014090/0700 | |
| Pages: | 11 |
| | Recorded: | 04/10/2002 | | |
Conveyance: | SECURITY AGREEMENT |
|
Total properties:
7
|
|
Patent #:
|
|
Issue Dt:
|
06/24/1986
|
Application #:
|
06674200
|
Filing Dt:
|
11/23/1984
|
Title:
|
SERIES BIASING SCHEME FOR FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1987
|
Application #:
|
06861165
|
Filing Dt:
|
05/09/1986
|
Title:
|
SERIES BIASING SCHEME FOR FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/1988
|
Application #:
|
06911270
|
Filing Dt:
|
09/24/1986
|
Title:
|
SUBCHANNEL DOPING TO REDUCE SHORT-GATE EFFECTS IN FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/1990
|
Application #:
|
07020920
|
Filing Dt:
|
03/02/1987
|
Title:
|
PROTECTIVE COATING USEFUL AS A PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/1988
|
Application #:
|
07030206
|
Filing Dt:
|
03/25/1987
|
Title:
|
CAPACITORLESS DC BIAS LINES FOR USE WITH R. F. SIGNAL PROCESSING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/1992
|
Application #:
|
07162912
|
Filing Dt:
|
03/02/1988
|
Title:
|
PROTECTIVE COATING USEFUL AS A PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/1994
|
Application #:
|
07737950
|
Filing Dt:
|
07/30/1991
|
Title:
|
HIGH FREQUENCY JFET
|
|
Assignee
|
|
|
3003 TASMAN DRIVE |
LOAN DOCUMENTATION HA155 |
SANTA CLARA, CALIFORNIA 95054 |
|
Correspondence name and address
|
|
SILICON VALLEY BANK
|
|
MARIBEL ARTEAGA
|
|
LOAN DECUMENTATION HA155
|
|
3003 TASMAN DRIVE
|
|
SANTA CLARA, CA 95054
|
Search Results as of:
05/27/2024 12:49 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|