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02/05/2004
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02/19/2004
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02/19/2004
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Filing Dt:
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12/20/2002
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Publication #:
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Pub Dt:
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06/24/2004
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Title:
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MULTI-LEVEL MEMORY CELL WITH LATERAL FLOATING SPACERS
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10328525
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Filing Dt:
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12/24/2002
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Publication #:
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Pub Dt:
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03/25/2004
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Title:
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APPARATUS AND METHOD FOR DYNAMIC PROGRAM DECOMPRESSION
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10328603
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Filing Dt:
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12/24/2002
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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POWER-ON MANAGEMENT FOR VOLTAGE DOWN-CONVERTER
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10328911
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Filing Dt:
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12/24/2002
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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MODULAR CHARGE PUMP ARCHITECTURE
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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10336129
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Filing Dt:
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01/03/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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INSULATED GATE BIPOLAR TRANSISTOR AND ELECTROSTATIC DISCHARGE CELL PROTECTION UTILIZING INSULATED GATE BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10336202
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Filing Dt:
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01/03/2003
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Title:
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THICK GATE OXIDE TRANSISTOR AND ELECTROSTATIC DISCHARGE PROTECTION UTILIZING THICK GATE OXIDE TRANSISTORS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10336639
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Filing Dt:
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01/02/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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FLASH MEMORY WITH TRENCH SELECT GATE AND FABRICATION PROCESS
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10338551
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Filing Dt:
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01/08/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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METHOD AND APPARATUS FOR AVOIDING GATED DIODE BREAKDOWN IN TRANSISTOR CIRCUITS
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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10339040
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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08/21/2003
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Title:
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SILICON CARBIDE SEMICONDUCTOR DEVICES WITH A REGROWN CONTACT LAYER
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Patent #:
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Issue Dt:
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12/26/2006
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Application #:
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10339218
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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METHOD AND APPARATUS FOR DETECTING AN UNUSED STATE IN A SEMICONDUCTOR CIRCUIT
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10340014
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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ROBUST POWER-ON METER AND METHOD
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10340342
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Filing Dt:
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01/10/2003
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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METHOD AND APPARATUS FOR EMULATING AN ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY (EEPROM) USING NON-VOLATILE FLOATING GATE MEMORY CELLS
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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10340439
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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ROBUST POWER-ON METER AND METHOD USING A LIMITED-WRITE MEMORY
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10340443
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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DEVICE AND METHOD FOR IMPROVED SERIAL BUS TRANSACTION USING INCREMENTAL ADDRESS DECODE
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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10341158
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Filing Dt:
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01/13/2003
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Title:
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BASEBAND FILTER FOR RECEIVERS
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10341994
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Filing Dt:
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01/13/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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WIRELESS DEVICE AND METHOD USING FREQUENCY HOPPING AND SWEEP MODES
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10351138
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Filing Dt:
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01/24/2003
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Publication #:
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Pub Dt:
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07/31/2003
| | | | |
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH FLOATING GATES HAVING MULTIPLE SHARP EDGES, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10351602
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Filing Dt:
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01/24/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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DISTRIBUTED LEVEL-SHIFTING NETWORK FOR CASCADING BROADBAND AMPLIFIERS
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10352314
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Filing Dt:
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01/27/2003
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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SPLIT-GATE POWER MODULE AND METHOD FOR SUPPRESSING OSCILLATION THEREIN
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10355859
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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CURRENT CONTROLLED BRIDGE AMPLIFIER
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10356783
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Filing Dt:
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01/30/2003
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Publication #:
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Pub Dt:
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08/28/2003
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH CONTROL GATE PROTRUDING PORTIONS
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Patent #:
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Issue Dt:
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08/12/2008
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10358601
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Filing Dt:
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02/04/2003
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Publication #:
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Pub Dt:
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12/11/2003
| | | | |
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND RAISED SOURCE LINE, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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10358623
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Filing Dt:
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02/04/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED SOURCE LINE AND FLOATING GATE, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10365382
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Filing Dt:
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02/12/2003
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Title:
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METHOD AND SYSTEM FOR FIVE-DISK FAULT TOLERANCE IN A DISK ARRAY
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10366177
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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CRYSTAL OSCILLATOR WITH CONTROL FEEDBACK TO MAINTAIN OSCILLATION
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Patent #:
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Issue Dt:
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05/22/2007
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10366189
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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POWER MANAGEMENT OF COMPUTER PERIPHERAL DEVICES WHICH DETERMINES NON-USAGE OF A DEVICE THROUGH USAGE DETECTION OF OTHER DEVICES
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Issue Dt:
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05/29/2007
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Application #:
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10368307
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Filing Dt:
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02/17/2003
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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PROGRAMMABLE POWER SUPPLY AND BROWNOUT DETECTOR FOR ELECTRONIC EQUIPMENT
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Patent #:
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Issue Dt:
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01/25/2005
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Application #:
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10374016
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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08/26/2004
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Title:
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MULTI-CHANNEL PROGRAMMABLE GAIN AMPLIFIER CONTROLLED WITH A SERIAL INTERFACE
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Issue Dt:
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02/27/2007
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Application #:
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10374162
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Filing Dt:
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02/24/2003
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Publication #:
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Pub Dt:
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08/26/2004
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Title:
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UNIVERSAL SERIAL BUS HUB WITH SHARED TRANSACTION TRANSLATOR MEMORY
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10374852
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Filing Dt:
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02/24/2003
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Publication #:
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Pub Dt:
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08/26/2004
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Title:
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UNIVERSAL SERIAL BUS HUB WITH SHARED HIGH SPEED HANDLER
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Issue Dt:
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04/18/2006
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10376682
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Filing Dt:
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02/28/2003
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Pub Dt:
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07/31/2003
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Title:
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SINGLE CHIP EMBEDDED MICROCONTROLLER HAVING MULTIPLE NON-VOLATILE ERASABLE PROMS SHARING A SINGLE HIGH VOLTAGE GENERATOR
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Issue Dt:
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10/24/2006
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Application #:
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10376838
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Filing Dt:
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02/28/2003
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Pub Dt:
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09/02/2004
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Title:
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DOUBLE BUFFERED FLASH PROGRAMMING
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Issue Dt:
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05/02/2006
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Application #:
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10376989
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Filing Dt:
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02/26/2003
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Pub Dt:
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07/10/2003
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Title:
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FOLDED CASCODE HIGH VOLTAGE OPERATIONAL AMPLIFIER WITH CLASS AB SOURCE FOLLOWER OUTPUT STAGE
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Issue Dt:
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07/04/2006
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Application #:
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10378413
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Filing Dt:
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03/03/2003
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Pub Dt:
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07/01/2004
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Title:
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TRANSISTOR CIRCUITS FOR SWITCHING HIGH VOLTAGES AND CURRENTS WITHOUT CAUSING SNAPBACK OR BREAKDOWN
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10378414
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Filing Dt:
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03/03/2003
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Pub Dt:
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09/09/2004
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Title:
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METHOD AND APPARATUS FOR DETECTING EXPOSURE OF A SEMICONDUCTOR CIRCUIT TO ULTRA-VIOLET LIGHT
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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10379484
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Filing Dt:
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03/03/2003
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Pub Dt:
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06/03/2004
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Title:
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SYSTEM AND METHOD FOR EXPANDING A PULSE WIDTH
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10382714
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Filing Dt:
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03/05/2003
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Publication #:
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Pub Dt:
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10/02/2003
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Title:
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VOLTAGE-LIMITED DISTRIBUTED CURRENT SOURCE FOR ULTRA-BROADBAND IMPEDANCE TERMINATION
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Issue Dt:
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09/26/2006
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Application #:
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10382756
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Filing Dt:
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03/05/2003
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Publication #:
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Pub Dt:
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05/13/2004
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Title:
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LOW-COMPLEXITY JOINT SYMBOL CCK DECODER
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10393583
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Filing Dt:
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03/20/2003
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Title:
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LOW POWER IMPLEMENTATION FOR INPUT SIGNALS OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10393896
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURRIED FLOATING GATE AND POINTED CHANNEL REGION
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10394975
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, POINTED FLOATING GATE AND POINTED CHANNEL REGION, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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10405253
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Filing Dt:
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04/01/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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BALLAST RESISTORS FOR TRANSISTOR DEVICES
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10406917
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Filing Dt:
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04/04/2003
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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METHOD OF FORMING A SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS AND STRAP REGIONS
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Patent #:
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Issue Dt:
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03/03/2015
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Application #:
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10406983
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Filing Dt:
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04/04/2003
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Publication #:
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Pub Dt:
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04/29/2004
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Title:
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INTELLIGENT NETWORK INTERFACE CONTROLLER
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Patent #:
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Issue Dt:
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07/01/2008
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10407572
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Filing Dt:
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04/04/2003
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Pub Dt:
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10/07/2004
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Title:
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LOW COMPLEXITY SYNCHRONIZATION FOR WIRELESS TRANSMISSION
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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10407615
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Filing Dt:
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04/03/2003
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Pub Dt:
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03/25/2004
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Title:
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NEGATIVE CHARGE PUMP WITH BULK BIASING
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