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04/21/2009
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06/16/2009
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06/12/2008
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02/11/2008
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08/13/2009
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08/13/2009
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02/14/2008
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11/27/2008
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07/07/2009
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02/20/2008
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06/12/2008
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07/06/2010
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02/27/2008
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08/27/2009
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12/20/2011
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03/06/2008
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09/10/2009
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MIRROR SCANNING SYSTEM
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02/03/2009
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03/10/2008
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06/26/2008
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RADIATION TOLERANT SRAM BIT
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01/13/2009
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12046160
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03/11/2008
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06/26/2008
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03/15/2011
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03/12/2008
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09/17/2009
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05/11/2010
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03/12/2008
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09/17/2009
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06/16/2009
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03/17/2008
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10/02/2008
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COLOR CONTROL FOR DYNAMIC SCANNING BACKLIGHT
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11/23/2010
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03/25/2008
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07/17/2008
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10/26/2010
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04/02/2008
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10/08/2009
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10/26/2010
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04/02/2008
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10/08/2009
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10/11/2011
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04/02/2008
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10/08/2009
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10/11/2011
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04/02/2008
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10/08/2009
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METHODS OF COUNTER-DOPING COLLECTOR REGIONS IN BIPOLAR TRANSISTORS
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08/10/2010
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04/11/2008
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06/09/2009
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04/18/2008
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08/14/2008
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06/09/2009
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04/25/2008
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08/21/2008
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FIELD-PROGRAMMABLE GATE ARRAY LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER UTILIZING TWO COMPLIMENTARY OUTPUT BUFFERS
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08/24/2010
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12110508
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04/28/2008
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10/30/2008
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04/28/2008
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10/30/2008
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07/13/2010
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04/29/2008
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08/21/2008
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03/24/2015
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05/02/2008
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08/28/2008
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03/24/2015
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05/02/2008
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08/28/2008
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12/18/2012
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05/09/2008
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12/04/2008
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10/11/2011
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05/12/2008
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01/15/2009
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10/20/2009
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08/03/2010
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05/21/2008
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RADIATION-TOLERANT FLASH-BASED FPGA MEMORY CELLS
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04/17/2012
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05/28/2008
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12/03/2009
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07/07/2009
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05/30/2008
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10/23/2008
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08/25/2009
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10/09/2008
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03/09/2010
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06/02/2008
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09/18/2008
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11/06/2012
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06/02/2008
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12/04/2008
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12/28/2010
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06/09/2008
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06/04/2009
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11/22/2011
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06/09/2008
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12/11/2008
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11/24/2009
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06/10/2008
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01/01/2009
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BRIGHTNESS CONTROL FOR DYNAMIC SCANNING BACKLIGHT
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10/12/2010
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06/10/2008
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01/01/2009
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02/23/2010
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06/13/2008
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04/26/2011
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03/05/2009
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04/19/2011
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01/22/2009
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09/18/2012
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07/14/2008
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01/14/2010
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05/26/2009
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07/14/2008
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03/02/2010
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07/14/2008
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12/04/2008
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07/07/2009
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10/30/2008
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06/09/2009
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07/15/2008
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Title:
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FPGA ARCHITECTURE HAVING TWO-LEVEL CLUSTER INPUT INTERCONNECT SCHEME WITHOUT BANDWIDTH LIMITATION
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|
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Patent #:
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Issue Dt:
|
04/20/2010
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Application #:
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12175399
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Filing Dt:
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07/17/2008
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Title:
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PROGRAMMABLE DELAY LINE COMPENSATED FOR PROCESS, VOLTAGE, AND TEMPERATURE
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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12176560
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Filing Dt:
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07/21/2008
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Publication #:
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Pub Dt:
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11/06/2008
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Title:
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SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT INCLUDING DUAL-FUNCTION ANALOG AND DIGITAL INPUTS
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Patent #:
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Issue Dt:
|
04/06/2010
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Application #:
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12177680
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Filing Dt:
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07/22/2008
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Title:
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SPLIT GATE MEMORY CELL FOR PROGRAMMABLE CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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12178874
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Filing Dt:
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07/24/2008
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Publication #:
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Pub Dt:
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12/11/2008
| | | | |
Title:
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PROGRAMMABLE SYSTEM ON A CHIP FOR TEMPERATURE MONITORING AND CONTROL
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Patent #:
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Issue Dt:
|
02/09/2010
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Application #:
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12179243
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Filing Dt:
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07/24/2008
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Publication #:
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Pub Dt:
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12/04/2008
| | | | |
Title:
|
ESD PROTECTION STRUCTURE FOR I/O PAD SUBJECT TO BOTH POSITIVE AND NEGATIVE VOLTAGES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12181533
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Filing Dt:
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07/29/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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Method and Apparatus for Secure Data Storage System
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Patent #:
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Issue Dt:
|
02/09/2010
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Application #:
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12187541
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Filing Dt:
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08/07/2008
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Title:
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QUADRATIC AND CUBIC COMPENSATION OF SIGMA-DELTA D/A AND A/D CONVERTERS
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12190907
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Filing Dt:
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08/13/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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BOOTSTRAP SUPPLY FOR SWITCHED MODE POWER CONVERTER
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Patent #:
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Issue Dt:
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03/15/2011
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Application #:
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12196978
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Filing Dt:
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08/22/2008
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Publication #:
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Pub Dt:
|
02/25/2010
| | | | |
Title:
|
REDUCED-EDGE RADIATION-TOLERANT NON-VOLATILE TRANSISTOR MEMORY CELLS
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Patent #:
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Issue Dt:
|
08/10/2010
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Application #:
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12198249
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Filing Dt:
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08/26/2008
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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APPARATUS FOR TESTING A PHRASE-LOCKED LOOP IN A BOUNDARY SCAN ENABLED DEVICE
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Patent #:
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Issue Dt:
|
09/28/2010
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Application #:
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12205656
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Filing Dt:
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09/05/2008
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Publication #:
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Pub Dt:
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03/11/2010
| | | | |
Title:
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CIRCUITS AND METHODS FOR TESTING FPGA ROUTING SWITCHES
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Patent #:
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Issue Dt:
|
02/07/2012
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Application #:
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12206954
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Filing Dt:
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09/09/2008
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Publication #:
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Pub Dt:
|
03/19/2009
| | | | |
Title:
|
EDGE TERMINATION FOR HIGH VOLTAGE SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/23/2010
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Application #:
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12207321
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Filing Dt:
|
09/09/2008
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Publication #:
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Pub Dt:
|
03/11/2010
| | | | |
Title:
|
FUSES FOR MEMORY REPAIR
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Patent #:
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Issue Dt:
|
01/03/2012
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Application #:
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12207686
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Filing Dt:
|
09/10/2008
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Publication #:
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|
Pub Dt:
|
03/26/2009
| | | | |
Title:
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DIGITAL FM RADIO TRANSMITTER
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Patent #:
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Issue Dt:
|
01/12/2010
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Application #:
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12215118
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Filing Dt:
|
06/24/2008
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Publication #:
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|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
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Patent #:
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Issue Dt:
|
10/26/2010
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Application #:
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12239418
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Filing Dt:
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09/26/2008
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Publication #:
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Pub Dt:
|
04/01/2010
| | | | |
Title:
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DIFFERENTIAL VOLTAGE MODE DRIVER AND DIGITAL IMPEDANCE CALIBERATION OF SAME
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Patent #:
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Issue Dt:
|
09/04/2012
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Application #:
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12263628
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Filing Dt:
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11/03/2008
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Publication #:
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Pub Dt:
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05/06/2010
| | | | |
Title:
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METHOD AND APPARATUS FOR METALLIC LINE TESTING OF A SUBSCRIBER LINE
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Patent #:
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Issue Dt:
|
05/18/2010
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Application #:
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12269798
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Filing Dt:
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11/12/2008
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Publication #:
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Pub Dt:
|
05/13/2010
| | | | |
Title:
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METHOD AND APPARATUS FOR STACKED DIE PACKAGE WITH INSULATED WIRE BONDS
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Patent #:
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Issue Dt:
|
09/25/2012
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Application #:
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12270774
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Filing Dt:
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11/13/2008
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Publication #:
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Pub Dt:
|
05/13/2010
| | | | |
Title:
|
CONTINUOUSLY INTERLEAVED ERROR CORRECTION
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Patent #:
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Issue Dt:
|
09/13/2011
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Application #:
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12315741
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Filing Dt:
|
12/05/2008
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Publication #:
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Pub Dt:
|
05/28/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH FLEXIBLE PLANAR LEADS
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Patent #:
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Issue Dt:
|
11/23/2010
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Application #:
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12334059
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Filing Dt:
|
12/12/2008
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Publication #:
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|
Pub Dt:
|
06/17/2010
| | | | |
Title:
|
PUSH-PULL FPGA CELL
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|
Patent #:
|
|
Issue Dt:
|
07/17/2012
|
Application #:
|
12336990
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Filing Dt:
|
12/17/2008
|
Publication #:
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|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
METHOD AND APPARATUS TO CONTROL DISPLAY BRIGHTNESS WITH AMBIENT LIGHT CORRECTION
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Patent #:
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Issue Dt:
|
05/10/2011
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Application #:
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12337201
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Filing Dt:
|
12/17/2008
|
Publication #:
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|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
DELAY LOCKED LOOP FOR AN FPGA ARCHITECTURE
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Patent #:
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|
Issue Dt:
|
10/01/2013
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Application #:
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12338780
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Filing Dt:
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12/18/2008
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Publication #:
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|
Pub Dt:
|
07/23/2009
| | | | |
Title:
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INCLUSION OF ASSESSMENT DATA IN MILLIMETER WAVE CONCEALED OBJECT DETECTION SYSTEMS
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Patent #:
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Issue Dt:
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05/07/2013
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Application #:
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12338807
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
|
12/03/2009
| | | | |
Title:
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SOFTWARE METHODOLOGY FOR AUTONOMOUS CONCEALED OBJECT DETECTION AND THREAT ASSESSMENT
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Patent #:
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Issue Dt:
|
02/08/2011
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Application #:
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12340358
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Filing Dt:
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12/19/2008
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Publication #:
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Pub Dt:
|
06/24/2010
| | | | |
Title:
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PLD PROVIDING SOFT WAKEUP LOGIC
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Patent #:
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Issue Dt:
|
10/18/2011
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Application #:
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12340440
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Filing Dt:
|
12/19/2008
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Publication #:
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Pub Dt:
|
06/24/2010
| | | | |
Title:
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PROGRAMMABLE LOGIC DEVICE WITH PROGRAMMABLE WAKEUP PINS
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Patent #:
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Issue Dt:
|
03/15/2011
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Application #:
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12340717
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Filing Dt:
|
12/21/2008
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Publication #:
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Pub Dt:
|
07/16/2009
| | | | |
Title:
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FINE TUNED MULTIPLE OUTPUT CONVERTER
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Patent #:
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Issue Dt:
|
04/19/2011
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Application #:
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12343308
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Filing Dt:
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12/23/2008
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Publication #:
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Pub Dt:
|
06/24/2010
| | | | |
Title:
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PUSH-PULL MEMORY CELL CONFIGURED FOR SIMULTANEOUS PROGRAMMING OF N-CHANNEL AND P-CHANNEL NON-VOLATILE TRANSISTORS
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Patent #:
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Issue Dt:
|
08/03/2010
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Application #:
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12345388
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Filing Dt:
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12/29/2008
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Publication #:
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Pub Dt:
|
06/04/2009
| | | | |
Title:
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RADIATION TOLERANT SRAM BIT
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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12345409
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Filing Dt:
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12/29/2008
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Publication #:
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Pub Dt:
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04/23/2009
| | | | |
Title:
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FIELD PROGRAMMABLE GATE ARRAY AND MICROCONTROLLER SYSTEM-ON-A-CHIP
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Patent #:
|
NONE
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Issue Dt:
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Application #:
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12348002
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Filing Dt:
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01/01/2009
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Publication #:
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Pub Dt:
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07/23/2009
| | | | |
Title:
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Low Voltage Drop Unidirectional Electronic Valve
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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12350419
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Filing Dt:
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01/08/2009
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Publication #:
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Pub Dt:
|
05/21/2009
| | | | |
Title:
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PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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12352512
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Filing Dt:
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01/12/2009
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Publication #:
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Pub Dt:
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07/30/2009
| | | | |
Title:
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SINGLE EVENT TRANSIENT MITIGATION AND MEASUREMENT IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
03/01/2011
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Application #:
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12359481
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Filing Dt:
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01/26/2009
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Publication #:
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Pub Dt:
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06/25/2009
| | | | |
Title:
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NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
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Patent #:
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Issue Dt:
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10/19/2010
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Application #:
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12360948
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Filing Dt:
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01/28/2009
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Title:
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INVERTING FLIP-FLOP FOR USE IN FIELD PROGRAMMABLE GATE ARRAYS
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Patent #:
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Issue Dt:
|
04/20/2010
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Application #:
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12360971
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Filing Dt:
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01/28/2009
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Title:
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(N+1) INPUT FLIP-FLOP PACKING WITH LOGIC IN FPGA ARCHITECTURES
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Patent #:
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Issue Dt:
|
04/12/2011
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Application #:
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12361835
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Filing Dt:
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01/29/2009
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Title:
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FIELD PROGRAMMABLE GATE ARRAY ARCHITECTURE HAVING CLOS NETWORK-BASED INPUT INTERCONNECT
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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12361955
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Filing Dt:
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01/29/2009
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Publication #:
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Pub Dt:
|
08/13/2009
| | | | |
Title:
|
SINGLE EVENT TRANSIENT MITIGATION AND MEASUREMENT IN INTEGRATED CIRCUITS
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|