skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:021985/0715   Pages: 17
Recorded: 12/10/2008
Attorney Dkt #:2131.0001
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 698
Page 6 of 7
Pages: 1 2 3 4 5 6 7
1
Patent #:
Issue Dt:
11/27/2007
Application #:
10962672
Filing Dt:
10/13/2004
Publication #:
Pub Dt:
12/29/2005
Title:
METHOD AND APPARATUS FOR DESIGNING A LAYOUT, AND COMPUTER PRODUCT
2
Patent #:
Issue Dt:
03/10/2009
Application #:
10963730
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
12/01/2005
Title:
METHOD AND PROGRAM FOR LIBRARY GENERATION
3
Patent #:
Issue Dt:
06/24/2008
Application #:
10967192
Filing Dt:
10/28/2009
Publication #:
Pub Dt:
12/22/2005
Title:
CHANGING OF OPERATING VOLTAGE IN SEMICONDUCTOR INTEGRATED CIRCUIT
4
Patent #:
Issue Dt:
09/09/2008
Application #:
10967210
Filing Dt:
10/19/2004
Publication #:
Pub Dt:
03/10/2005
Title:
FERROELECTRIC CAPACITOR
5
Patent #:
Issue Dt:
02/13/2007
Application #:
10968110
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
01/05/2006
Title:
METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT AND LOGIC DESIGN PROGRAM
6
Patent #:
Issue Dt:
05/15/2007
Application #:
10968120
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
12/22/2005
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT OPERABLE TO CONTROL POWER SUPPLY VOLTAGE
7
Patent #:
Issue Dt:
04/07/2009
Application #:
10968140
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
12/29/2005
Title:
TEST PATTERN GENERATOR, TEST CIRCUIT TESTER, TEST PATTERN GENERATING METHOD, TEST CIRCUIT TESTING METHOD, AND COMPUTER PRODUCT
8
Patent #:
Issue Dt:
04/29/2008
Application #:
10972380
Filing Dt:
10/26/2004
Publication #:
Pub Dt:
11/24/2005
Title:
DATA TRANSFER DEVICE AND ABNORMAL TRANSFER STATE DETECTING METHOD
9
Patent #:
Issue Dt:
07/20/2010
Application #:
10972429
Filing Dt:
10/26/2004
Publication #:
Pub Dt:
12/08/2005
Title:
ADDRESS TRANSLATOR AND ADDRESS TRANSLATION METHOD
10
Patent #:
Issue Dt:
09/11/2007
Application #:
10973270
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
12/08/2005
Title:
METHOD AND APPARATUS FOR GENERATING EXPOSURE DATA
11
Patent #:
Issue Dt:
07/13/2010
Application #:
10986146
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
02/02/2006
Title:
LOGIC DESCRIPTION LIBRARY OF DIFFERENTIAL INPUT CIRCUIT
12
Patent #:
NONE
Issue Dt:
Application #:
11011034
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
12/29/2005
Title:
PROCESSOR AND SEMICONDUCTOR DEVICE WITH RECONFIGURABLE CIRCUITS
13
Patent #:
NONE
Issue Dt:
Application #:
11011072
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
02/09/2006
Title:
DMA transfer apparatus and method of controlling data transfer
14
Patent #:
Issue Dt:
08/14/2007
Application #:
11014814
Filing Dt:
12/20/2004
Publication #:
Pub Dt:
12/15/2005
Title:
LSI DESIGN METHOD
15
Patent #:
Issue Dt:
06/28/2011
Application #:
11019195
Filing Dt:
12/23/2004
Publication #:
Pub Dt:
03/09/2006
Title:
PROGRAM SECTION LAYOUT METHOD AND LAYOUT PROGRAM
16
Patent #:
NONE
Issue Dt:
Application #:
11019366
Filing Dt:
12/23/2004
Publication #:
Pub Dt:
12/29/2005
Title:
Reconfigurable processor with register groups located between input ports of arithmetic logic units
17
Patent #:
Issue Dt:
10/14/2008
Application #:
11023516
Filing Dt:
12/29/2004
Publication #:
Pub Dt:
03/23/2006
Title:
LAYOUT METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT, LAYOUT PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND LAYOUT SYSTEM FOR SEMICONDUCTOR INTEGRATED CIRCUIT
18
Patent #:
Issue Dt:
05/22/2007
Application #:
11023829
Filing Dt:
12/29/2004
Publication #:
Pub Dt:
01/26/2006
Title:
LAYOUT METHOD OF DECOUPLING CAPACITORS
19
Patent #:
Issue Dt:
04/29/2008
Application #:
11024482
Filing Dt:
12/30/2004
Publication #:
Pub Dt:
12/22/2005
Title:
METHOD AND APPARATUS FOR DESIGNING A LAYOUT, AND COMPUTER PRODUCT
20
Patent #:
Issue Dt:
09/07/2010
Application #:
11024843
Filing Dt:
12/30/2004
Publication #:
Pub Dt:
05/04/2006
Title:
MEMORY CONTROL CIRCUIT AND MICROPROCESSORY SYSTEM FOR PRE-FETCHING INSTRUCTIONS
21
Patent #:
Issue Dt:
08/25/2009
Application #:
11035055
Filing Dt:
01/14/2005
Publication #:
Pub Dt:
01/05/2006
Title:
A SEMICONDUCTOR DEVICE HAVING AN ARITHMETIC UNIT OF A RECONFIGURABLE CIRCUIT CONFIGURATION IN ACCORDANCE WITH STORED CONFIGURATION DATA AND A MEMORY STORING FIXED VALUE DATA TO BE SUPPLIED TO THE ARITHMETIC UNIT, REQUIRING NO DATA AREA FOR STORING FIXED VALUE DATA TO BE SET IN A CONFIGURATION MEMORY
22
Patent #:
Issue Dt:
07/24/2012
Application #:
11036332
Filing Dt:
01/18/2005
Publication #:
Pub Dt:
09/29/2005
Title:
MICROCOMPUTER WITH INTERNAL DMA
23
Patent #:
Issue Dt:
04/23/2013
Application #:
11036392
Filing Dt:
01/18/2005
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD AND APPARATUS FOR TRANSFERRING DATA
24
Patent #:
Issue Dt:
11/03/2009
Application #:
11036395
Filing Dt:
01/18/2005
Publication #:
Pub Dt:
10/06/2005
Title:
MICROCOMPUTER CAPABLE OF MONITORING INTERNAL MEMORY
25
Patent #:
NONE
Issue Dt:
Application #:
11037049
Filing Dt:
01/19/2005
Publication #:
Pub Dt:
12/29/2005
Title:
RECONFIGURABLE PROCESSOR AND SEMICONDUCTOR DEVICE FOR SWITCHING APPLICATIONS USING SWITCHING CONDITIONS
26
Patent #:
Issue Dt:
12/05/2006
Application #:
11042061
Filing Dt:
01/26/2005
Publication #:
Pub Dt:
06/16/2005
Title:
INTEGRATED LOGIC CIRCUIT AND HIERARCHICAL DESIGN METHOD THEREOF
27
Patent #:
Issue Dt:
04/27/2010
Application #:
11047744
Filing Dt:
02/02/2005
Publication #:
Pub Dt:
03/30/2006
Title:
DATA TRANSFERRING DEVICE FOR TRANSFERRING DATA SENT FROM ONE COMMUNICATION DEVICE TO ANOTHER COMMUNICATION DEVICE
28
Patent #:
Issue Dt:
11/17/2009
Application #:
11047774
Filing Dt:
02/02/2005
Publication #:
Pub Dt:
06/16/2005
Title:
NETWORK SWITCHING DEVICE AND NETWORK SWITCHING METHOD
29
Patent #:
Issue Dt:
12/02/2008
Application #:
11060502
Filing Dt:
02/18/2005
Publication #:
Pub Dt:
05/04/2006
Title:
IMAGE DRAWING APPARATUS
30
Patent #:
Issue Dt:
08/28/2007
Application #:
11064084
Filing Dt:
02/24/2005
Publication #:
Pub Dt:
04/13/2006
Title:
BUS BRIDGE AND DATA TRANSFER METHOD
31
Patent #:
Issue Dt:
11/29/2011
Application #:
11065563
Filing Dt:
02/25/2005
Publication #:
Pub Dt:
06/30/2005
Title:
UNIVERSAL SERIAL BUS DEVICE AND METHOD FOR CONTROLLING UNIVERSAL SERIAL BUS DEVICE
32
Patent #:
Issue Dt:
12/04/2007
Application #:
11075321
Filing Dt:
03/09/2005
Publication #:
Pub Dt:
07/28/2005
Title:
METHOD AND SYSTEM FOR EFFICIENTLY VERIFYING OPTICAL PROXIMITY CORRECTION
33
Patent #:
Issue Dt:
10/28/2008
Application #:
11080543
Filing Dt:
03/16/2005
Publication #:
Pub Dt:
06/01/2006
Title:
METHOD FOR CORRECTING TIMING ERROR WHEN DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
34
Patent #:
Issue Dt:
11/20/2007
Application #:
11080555
Filing Dt:
03/16/2005
Publication #:
Pub Dt:
05/25/2006
Title:
METHOD AND APPARATUS FOR VERIFYING SEMICONDUCTOR INTEGRATED CIRCUITS
35
Patent #:
Issue Dt:
11/25/2008
Application #:
11082798
Filing Dt:
03/18/2005
Publication #:
Pub Dt:
07/28/2005
Title:
PACKET IDENTIFICATION DEVICE AND PACKET IDENTIFICATION METHOD
36
Patent #:
Issue Dt:
11/13/2007
Application #:
11088984
Filing Dt:
03/24/2005
Publication #:
Pub Dt:
09/29/2005
Title:
METHOD OF MANUFACTURING A SILICIDE LAYER
37
Patent #:
Issue Dt:
01/04/2011
Application #:
11089352
Filing Dt:
03/25/2005
Publication #:
Pub Dt:
01/19/2006
Title:
SECURE PROCESSOR AND A PROGRAM FOR A SECURE PROCESSOR
38
Patent #:
Issue Dt:
06/02/2009
Application #:
11089359
Filing Dt:
03/25/2005
Publication #:
Pub Dt:
06/22/2006
Title:
DEVICE AND METHOD FOR IMAGE PROCESSING
39
Patent #:
Issue Dt:
12/16/2008
Application #:
11093264
Filing Dt:
03/30/2005
Publication #:
Pub Dt:
10/06/2005
Title:
PATTERN INSPECTION METHOD, PATTERN INSPECTION SYSTEM AND PATTERN INSPECTION PROGRAM OF PHOTOMASK
40
Patent #:
Issue Dt:
01/15/2013
Application #:
11094640
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
05/11/2006
Title:
REQUIREMENT MANAGEMENT DEVICE, REQUIREMENT MANAGEMENT METHOD, COMPUTER PRODUCT
41
Patent #:
Issue Dt:
11/23/2010
Application #:
11094657
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
05/04/2006
Title:
MACRO DELIVERY SYSTEM AND MACRO DELIVERY PROGRAM
42
Patent #:
Issue Dt:
04/01/2008
Application #:
11097204
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
06/08/2006
Title:
METHOD AND PROGRAM FOR DESIGNING SEMICONDUCTOR DEVICE
43
Patent #:
Issue Dt:
12/23/2008
Application #:
11099699
Filing Dt:
04/06/2005
Publication #:
Pub Dt:
10/06/2005
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
44
Patent #:
NONE
Issue Dt:
Application #:
11101520
Filing Dt:
04/08/2005
Publication #:
Pub Dt:
07/13/2006
Title:
Method and apparatus for supporting verification, and computer product
45
Patent #:
Issue Dt:
07/15/2008
Application #:
11106697
Filing Dt:
04/15/2005
Publication #:
Pub Dt:
03/23/2006
Title:
TIMING ANALYSIS APPARATUS, TIMING ANALYSIS METHOD, AND COMPUTER PRODUCT
46
Patent #:
Issue Dt:
07/14/2009
Application #:
11108676
Filing Dt:
04/19/2005
Publication #:
Pub Dt:
10/20/2005
Title:
--A MASTER-SLICE-TYPE SEMICONDUCTOR INTEGRATED CIRCUIT HAVING A BULK LAYER AND A PLURALITY OF WIRING LAYERS AND A DESIGN METHOD THEREFOR--
47
Patent #:
Issue Dt:
09/26/2006
Application #:
11108815
Filing Dt:
04/19/2005
Publication #:
Pub Dt:
08/18/2005
Title:
OPERATIONAL AMPLIFIER
48
Patent #:
Issue Dt:
05/18/2010
Application #:
11116406
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD OF GENERATING SIMULATION MODEL WHILE CIRCUIT INFORMATION IS OMMITTED
49
Patent #:
Issue Dt:
11/24/2009
Application #:
11146237
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
07/20/2006
Title:
MICROCONTROLLER
50
Patent #:
Issue Dt:
04/07/2009
Application #:
11149188
Filing Dt:
06/10/2005
Publication #:
Pub Dt:
12/29/2005
Title:
MULTILAYER INTERCONNECTION STRUCTURE AND METHOD FOR FORMING THE SAME
51
Patent #:
Issue Dt:
02/12/2008
Application #:
11149261
Filing Dt:
06/10/2005
Publication #:
Pub Dt:
10/13/2005
Title:
DATA STORAGE METHOD AND DATA STORAGE DEVICE
52
Patent #:
Issue Dt:
01/20/2009
Application #:
11156633
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
10/19/2006
Title:
METHOD FOR ELIMINATING HOLD ERROR IN SCAN CHAIN
53
Patent #:
Issue Dt:
02/27/2007
Application #:
11156668
Filing Dt:
06/21/2005
Publication #:
Pub Dt:
10/05/2006
Title:
METHOD AND APPARATUS FOR LAYING OUT CELLS IN A SEMICONDUCTOR DEVICE
54
Patent #:
Issue Dt:
02/27/2007
Application #:
11157803
Filing Dt:
06/22/2005
Publication #:
Pub Dt:
09/21/2006
Title:
APPARATUS AND METHOD FOR TESTING CODEC SOFTWARE BY UTILIZING PARALLEL PROCESSES
55
Patent #:
Issue Dt:
01/20/2009
Application #:
11165239
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
09/07/2006
Title:
MICROPROCESSOR
56
Patent #:
Issue Dt:
12/15/2009
Application #:
11165244
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR DMA TRANSFER
57
Patent #:
NONE
Issue Dt:
Application #:
11166153
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
10/05/2006
Title:
Layout verification method and layout design unit
58
Patent #:
Issue Dt:
03/15/2011
Application #:
11167310
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
01/05/2006
Title:
SEMICONDUCTOR DEVICE HAVING A DYNAMICALLY RECONFIGURABLE CIRCUIT CONFIGURATION
59
Patent #:
Issue Dt:
03/15/2011
Application #:
11168415
Filing Dt:
06/29/2005
Publication #:
Pub Dt:
11/17/2005
Title:
PLASMA ETCHING METHOD AND APPARATUS
60
Patent #:
Issue Dt:
07/12/2011
Application #:
11168448
Filing Dt:
06/29/2005
Publication #:
Pub Dt:
10/05/2006
Title:
MICROCONTROLLER
61
Patent #:
Issue Dt:
04/14/2009
Application #:
11175200
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
10/19/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR DESIGNING THE SAME
62
Patent #:
Issue Dt:
02/23/2010
Application #:
11206814
Filing Dt:
08/19/2005
Publication #:
Pub Dt:
10/05/2006
Title:
TIMING ANALYSIS METHOD, TIMING ANALYSIS PROGRAM, AND TIMING ANALYSIS TOOL
63
Patent #:
Issue Dt:
03/04/2008
Application #:
11224129
Filing Dt:
09/13/2005
Publication #:
Pub Dt:
03/23/2006
Title:
LAYOUT VERIFICATION METHOD AND DEVICE
64
Patent #:
Issue Dt:
09/14/2010
Application #:
11234111
Filing Dt:
09/26/2005
Publication #:
Pub Dt:
01/19/2006
Title:
Communication device and communication method using tokens and local counters of discarded packets to maintain order of the packets
65
Patent #:
Issue Dt:
05/12/2009
Application #:
11236487
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
08/17/2006
Title:
TEST PATTERN GENERATOR AND TEST PATTERN GENERATION METHOD FOR ONBOARD MEMORY DEVICES
66
Patent #:
Issue Dt:
05/25/2010
Application #:
11236532
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
10/05/2006
Title:
METHOD, STORAGE MEDIA STORING PROGRAM, AND COMPONENT FOR AVOIDING INCREASE IN DELAY TIME IN SEMICONDUCTOR CIRCUIT HAVING PLURAL WIRING LAYERS
67
Patent #:
Issue Dt:
03/03/2009
Application #:
11237658
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
08/31/2006
Title:
EXPOSURE DATA GENERATOR AND METHOD THEREOF
68
Patent #:
Issue Dt:
11/04/2008
Application #:
11237741
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
10/19/2006
Title:
LAYOUT METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND CELL FRAME STANDARDIZATION PROGRAM
69
Patent #:
Issue Dt:
11/18/2008
Application #:
11238957
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
09/21/2006
Title:
MARGINLESS STATUS DETERMINATION CIRCUIT
70
Patent #:
Issue Dt:
04/06/2010
Application #:
11249361
Filing Dt:
10/14/2005
Publication #:
Pub Dt:
09/21/2006
Title:
METHOD AND APPARATUS FOR SUPPORTING VERIFICATION, AND COMPUTER PRODUCT
71
Patent #:
Issue Dt:
07/15/2008
Application #:
11253615
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
09/14/2006
Title:
APPARATUS AND METHOD FOR VERIFICATION SUPPORT, AND COMPUTER PRODUCT
72
Patent #:
Issue Dt:
12/02/2008
Application #:
11258949
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
02/22/2007
Title:
NON-INCLUSIVE CACHE SYSTEM WITH SIMPLE CONTROL OPERATION
73
Patent #:
Issue Dt:
11/01/2011
Application #:
11261790
Filing Dt:
10/31/2005
Publication #:
Pub Dt:
01/25/2007
Title:
PARAMETER EXTRACTING METHOD
74
Patent #:
Issue Dt:
08/30/2011
Application #:
11275923
Filing Dt:
02/03/2006
Publication #:
Pub Dt:
04/19/2007
Title:
SEMICONDUCTOR STORAGE DEVICE AND MEMORY TEST CIRCUIT
75
Patent #:
Issue Dt:
10/07/2008
Application #:
11299893
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
05/04/2006
Title:
MICROCOMPUTER, METHOD OF CONTROLLING CACHE MEMORY, AND METHOD OF CONTROLLING CLOCK
76
Patent #:
NONE
Issue Dt:
Application #:
11299894
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
04/05/2007
Title:
Simulation apparatus and simulation method
77
Patent #:
Issue Dt:
04/29/2008
Application #:
11305184
Filing Dt:
12/19/2005
Publication #:
Pub Dt:
02/22/2007
Title:
METHOD FOR SIMULATING POWER VOLTAGE DISTRIBUTION OF SEMICONDUCTOR INTEGRATED CIRCUIT AND SIMULATION PROGRAM
78
Patent #:
Issue Dt:
03/30/2010
Application #:
11312611
Filing Dt:
12/21/2005
Publication #:
Pub Dt:
07/19/2007
Title:
ENCRYPTION DEVICE
79
Patent #:
Issue Dt:
11/04/2008
Application #:
11334694
Filing Dt:
01/19/2006
Publication #:
Pub Dt:
01/18/2007
Title:
LOGIC-SYNTHESIS METHOD AND LOGIC SYNTHESIZER
80
Patent #:
Issue Dt:
01/25/2011
Application #:
11342969
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/03/2007
Title:
MOVING PICTURE CODING PROGRAM, PROGRAM STORAGE MEDIUM, AND CODING APPARATUS
81
Patent #:
Issue Dt:
02/01/2011
Application #:
11342975
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/03/2007
Title:
MOVING PICTURE ENCODER
82
Patent #:
Issue Dt:
01/03/2012
Application #:
11342976
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/03/2007
Title:
MOVING PICTURE ENCODING DEVICE, FADE SCENE DETECTION DEVICE AND STORAGE MEDIUM
83
Patent #:
Issue Dt:
02/07/2012
Application #:
11343182
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/03/2007
Title:
FRAME BUFFER MANAGEMENT PROGRAM, PROGRAM STORAGE MEDIUM AND MANAGEMENT METHOD
84
Patent #:
Issue Dt:
10/29/2013
Application #:
11350072
Filing Dt:
02/09/2006
Publication #:
Pub Dt:
04/12/2007
Title:
Extended language specification assigning method, program developing method and computer-readable storage medium
85
Patent #:
Issue Dt:
12/06/2011
Application #:
11352249
Filing Dt:
02/13/2006
Publication #:
Pub Dt:
07/13/2006
Title:
METHOD FOR CALCULATING DELAY TIME, PROGRAM FOR CALCULATING DELAY TIME AND DEVICE FOR CALCULATING DELAY TIME
86
Patent #:
Issue Dt:
06/28/2011
Application #:
11360609
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
03/29/2007
Title:
DMA TRANSFER SYSTEM USING VIRTUAL CHANNELS
87
Patent #:
Issue Dt:
02/24/2009
Application #:
11362828
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
05/03/2007
Title:
MULTI-CORE-MODEL SIMULATION METHOD, MULTI-CORE MODEL SIMULATOR, AND COMPUTER PRODUCT
88
Patent #:
Issue Dt:
07/17/2007
Application #:
11362926
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
06/07/2007
Title:
LAYOUT METHOD AND COMPUTER PROGRAM PRODUCT
89
Patent #:
NONE
Issue Dt:
Application #:
11372393
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
07/13/2006
Title:
Method and apparatus for supporting verification of system, and computer product
90
Patent #:
Issue Dt:
12/28/2010
Application #:
11376126
Filing Dt:
03/16/2006
Publication #:
Pub Dt:
10/04/2007
Title:
TASK DISTRIBUTION PROGRAM AND TASK DISTRIBUTION DEVICE FOR A PROCESSOR DEVICE HAVING MULTIPROCESSORS
91
Patent #:
Issue Dt:
07/14/2009
Application #:
11389008
Filing Dt:
03/27/2006
Publication #:
Pub Dt:
05/17/2007
Title:
METHOD AND DEVICE FOR VERIFYING TIMING IN A SEMICONDUCTOR INTEGRATED CIRCUIT
92
Patent #:
Issue Dt:
09/21/2010
Application #:
11396660
Filing Dt:
04/04/2006
Publication #:
Pub Dt:
05/10/2007
Title:
LAYOUT ANALYSIS METHOD AND APPARATUS FOR SEMICONDUCTOR INTEGRATED CIRCUIT
93
Patent #:
Issue Dt:
09/02/2008
Application #:
11407950
Filing Dt:
04/21/2006
Publication #:
Pub Dt:
04/26/2007
Title:
SEMICONDUCTOR-CIRCUIT-DEVICE VERIFYING METHOD AND CAD APPARATUS FOR IMPLEMENTING THE SAME
94
Patent #:
Issue Dt:
07/20/2010
Application #:
11412947
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
07/12/2007
Title:
SYNCHRONIZATION DETERMINATION METHOD AND APPARATUS
95
Patent #:
Issue Dt:
04/01/2008
Application #:
11419909
Filing Dt:
05/23/2006
Publication #:
Pub Dt:
08/30/2007
Title:
ROUTING DISPLAY FACILITATING TASK OF REMOVING ERROR
96
Patent #:
Issue Dt:
05/06/2008
Application #:
11433353
Filing Dt:
05/15/2006
Publication #:
Pub Dt:
06/21/2007
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND DATA OUTPUT METHOD
97
Patent #:
Issue Dt:
08/24/2010
Application #:
11442971
Filing Dt:
05/31/2006
Publication #:
Pub Dt:
08/23/2007
Title:
RECONFIGURABLE CIRCUIT
98
Patent #:
Issue Dt:
05/25/2010
Application #:
11442993
Filing Dt:
05/31/2006
Publication #:
Pub Dt:
08/09/2007
Title:
SYNCHRONIZING APPARATUS AND SYNCHRONIZING METHOD
99
Patent #:
Issue Dt:
06/29/2010
Application #:
11444297
Filing Dt:
06/01/2006
Publication #:
Pub Dt:
08/09/2007
Title:
BAND ALLOCATION METHOD, COMMUNICATION CONTROL UNIT AND COMMUNICATION APPARATUS
100
Patent #:
Issue Dt:
06/18/2013
Application #:
11456437
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
08/23/2007
Title:
SECURE PROCESSOR
Assignor
1
Exec Dt:
11/04/2008
Assignee
1
7-1, NISHI-SHINJUKU 2-CHOME
SHINJUKU-KU, TOKYO 163-0722, JAPAN
Correspondence name and address
STAAS & HALSEY LLP
ATTENTION: H. J. STAAS
1201 NEW YORK AVE., N.W., 7TH FLOOR
WASHINGTON, D.C. 20005

Search Results as of: 05/23/2024 08:28 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT