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Reel/Frame:052337/0735   Pages: 4
Recorded: 04/08/2020
Attorney Dkt #:TW0036
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 25
1
Patent #:
6531776
Issue Dt:
03/11/2003
Application #:
09940852
Filing Dt:
08/29/2001
Publication #:
US20020132466
Pub Dt:
09/19/2002
Title:
SEMICONDUCTOR DEVICE HAVING REDUCED INTERCONNECT-LINE PARASITIC CAPACITANCE
2
Patent #:
6444574
Issue Dt:
09/03/2002
Application #:
09948485
Filing Dt:
09/06/2001
Title:
METHOD FOR FORMING STEPPED CONTACT HOLE FOR SEMICONDUCTOR DEVICES
3
Patent #:
6583055
Issue Dt:
06/24/2003
Application #:
10057142
Filing Dt:
01/25/2002
Title:
METHOD OF FORMING STEPPED CONTACT TRENCH FOR SEMICONDUCTOR DEVICES
4
Patent #:
6670254
Issue Dt:
12/30/2003
Application #:
10065298
Filing Dt:
10/01/2002
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
5
Patent #:
6828633
Issue Dt:
12/07/2004
Application #:
10248868
Filing Dt:
02/26/2003
Publication #:
US20040089899
Pub Dt:
05/13/2004
Title:
SILICON-ON-INSULATOR DEVICE WITH CONTROL TRANSISTOR
6
Patent #:
6807454
Issue Dt:
10/19/2004
Application #:
10249103
Filing Dt:
03/17/2003
Publication #:
US20030212469
Pub Dt:
11/13/2003
Title:
METHOD FOR AUTOMATICALLY CONTROLLING DEFECT -SPECIFICATION IN A SEMICONDUCTOR MANUFACTURING PROCESS
7
Patent #:
6699755
Issue Dt:
03/02/2004
Application #:
10249212
Filing Dt:
03/24/2003
Title:
METHOD FOR PRODUCING A GATE
8
Patent #:
7461472
Issue Dt:
12/09/2008
Application #:
10250228
Filing Dt:
06/16/2003
Publication #:
US20040253522
Pub Dt:
12/16/2004
Title:
HALF-TONE PHASE SHIFT MASK AND PATTERNING METHOD USING THEREOF
9
Patent #:
6881590
Issue Dt:
04/19/2005
Application #:
10604895
Filing Dt:
08/25/2003
Publication #:
US20050048760
Pub Dt:
03/03/2005
Title:
RE-PERFORMABLE SPIN-ON PROCESS
10
Patent #:
7008733
Issue Dt:
03/07/2006
Application #:
10605377
Filing Dt:
09/25/2003
Publication #:
US20050069781
Pub Dt:
03/31/2005
Title:
METHOD OF IMPROVING A RESOLUTION OF CONTACT HOLE PATTERNS BY UTILIZING ALTERNATE PHASE SHIFT PRINCIPLE
11
Patent #:
6995086
Issue Dt:
02/07/2006
Application #:
10710237
Filing Dt:
06/28/2004
Publication #:
US20050148168
Pub Dt:
07/07/2005
Title:
METHOD FOR FABRICATING A THROUGH HOLE ON A SEMICONDUCTOR SUBSTRATE
12
Patent #:
7019582
Issue Dt:
03/28/2006
Application #:
10711624
Filing Dt:
09/29/2004
Publication #:
US20050029590
Pub Dt:
02/10/2005
Title:
SILICON-ON-INSULATOR DEVICE STRUCTURE
13
Patent #:
7056787
Issue Dt:
06/06/2006
Application #:
10905610
Filing Dt:
01/12/2005
Publication #:
US20050233519
Pub Dt:
10/20/2005
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
14
Patent #:
7098124
Issue Dt:
08/29/2006
Application #:
10908871
Filing Dt:
05/31/2005
Publication #:
US20060134910
Pub Dt:
06/22/2006
Title:
METHOD OF FORMING CONTACT HOLE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE
15
Patent #:
7030015
Issue Dt:
04/18/2006
Application #:
10941939
Filing Dt:
09/16/2004
Publication #:
US20050053722
Pub Dt:
03/10/2005
Title:
METHOD FOR FORMING A TITANIUM NITRIDE LAYER
16
Patent #:
7550372
Issue Dt:
06/23/2009
Application #:
11162115
Filing Dt:
08/29/2005
Publication #:
US20060166497
Pub Dt:
07/27/2006
Title:
METHOD OF FABRICATING CONDUCTIVE LINES WITH SILICIDE LAYER
17
Patent #:
7612433
Issue Dt:
11/03/2009
Application #:
11162725
Filing Dt:
09/21/2005
Publication #:
US20060183295
Pub Dt:
08/17/2006
Title:
SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED CONTACT
18
Patent #:
7465632
Issue Dt:
12/16/2008
Application #:
11163728
Filing Dt:
10/28/2005
Publication #:
US20060216915
Pub Dt:
09/28/2006
Title:
METHOD FOR FORMING BURIED DOPED REGION
19
Patent #:
7268055
Issue Dt:
09/11/2007
Application #:
11163980
Filing Dt:
11/07/2005
Publication #:
US20060252203
Pub Dt:
11/09/2006
Title:
METHOD OF FABRICATING SEMICONDUCTOR DEVICE
20
Patent #:
7273787
Issue Dt:
09/25/2007
Application #:
11164332
Filing Dt:
11/18/2005
Publication #:
US20060281251
Pub Dt:
12/14/2006
Title:
METHOD FOR MANUFACTURING GATE DIELECTRIC LAYER
21
Patent #:
7429527
Issue Dt:
09/30/2008
Application #:
11853025
Filing Dt:
09/11/2007
Publication #:
US20080003812
Pub Dt:
01/03/2008
Title:
METHOD OF MANUFACTURING SELF-ALIGNED CONTACT OPENINGS
22
Patent #:
7803692
Issue Dt:
09/28/2010
Application #:
12562142
Filing Dt:
09/18/2009
Publication #:
US20100003796
Pub Dt:
01/07/2010
Title:
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED CONTACT
23
Patent #:
8722538
Issue Dt:
05/13/2014
Application #:
13610913
Filing Dt:
09/12/2012
Publication #:
US20140011357
Pub Dt:
01/09/2014
Title:
METHOD FOR FORMING CONTACT WINDOW
24
Patent #:
8822303
Issue Dt:
09/02/2014
Application #:
13620730
Filing Dt:
09/15/2012
Publication #:
US20140004665
Pub Dt:
01/02/2014
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
25
Patent #:
9230856
Issue Dt:
01/05/2016
Application #:
14316816
Filing Dt:
06/27/2014
Publication #:
US20150270336
Pub Dt:
09/24/2015
Title:
METHOD FOR MANUFACTURING STRUCTURE HAVING AIR GAP
Assignor
1
POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Exec Dt:
03/31/2020
Assignee
1
POWERCHIP TECHNOLOGY CORPORATION
NO. 12, LI-HSIN RD. I, SCIENCE-BASED INDUSTRIAL PARK,
HSINCHU, TAIWAN
Correspondence name and address
JCIPRNET
8F-1, NO. 100, ROOSEVELT RD. SEC. 2,
TAIPEI, 100404 TAIWAN

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