Patent Assignment Details
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| Reel/Frame: | 038430/0738 | |
| Pages: | 6 |
| | Recorded: | 04/30/2016 | | |
| Attorney Dkt #: | ST-15-RO-0335US01 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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05/29/2018
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Application #:
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15140997
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Filing Dt:
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04/28/2016
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Publication #:
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Pub Dt:
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06/08/2017
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Title:
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Method for Managing a Fail Bit Line of a Memory Plane of a Non Volatile Memory and Corresponding Memory Device
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Assignee
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| ZI DE PEYNIER-ROUSSET |
| AVENUE COQ |
| ROUSSET, FRANCE 13790 |
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Correspondence name and address
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SLATER MATSIL, LLP
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17950 PRESTON RD.
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SUITE 1000
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DALLAS, TX 75252
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