Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 038961/0743 | |
| Pages: | 3 |
| | Recorded: | 06/20/2016 | | |
| Attorney Dkt #: | 81652463US01 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2020
|
Application #:
|
15187490
|
Filing Dt:
|
06/20/2016
|
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
|
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR PROCESSING SYNCHRONIZED NETWORK FRAMES USING A HARDWARE SYNCHRONIZATION CIRCUIT
|
|
|
Assignee
|
|
|
|
|
| HIGH TECH CAMPUS 60 |
| EINDHOVEN, NETHERLANDS 5656 |
|
|
Correspondence name and address
|
| |
INTELLECTUAL PROPERTY AND LICENSING NXP
|
| |
411 EAST PLUMERIA DRIVE, MS41
|
| |
SAN JOSE, CA 95134
|
Search Results as of:
06/03/2024 02:18 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
