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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036888/0745   Pages: 13
Recorded: 10/19/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 219
Page 1 of 3
Pages: 1 2 3
1
Patent #:
7049651
Issue Dt:
05/23/2006
Application #:
10715142
Filing Dt:
11/17/2003
Publication #:
US20050104117
Pub Dt:
05/19/2005
Title:
CHARGE-TRAPPING MEMORY DEVICE INCLUDING HIGH PERMITTIVITY STRIPS
2
Patent #:
7071729
Issue Dt:
07/04/2006
Application #:
10716381
Filing Dt:
11/17/2003
Publication #:
US20040151276
Pub Dt:
08/05/2004
Title:
DUAL-PURPOSE SHIFT REGISTER
3
Patent #:
7145483
Issue Dt:
12/05/2006
Application #:
10730443
Filing Dt:
12/08/2003
Publication #:
US20050122239
Pub Dt:
06/09/2005
Title:
CHIP TO CHIP INTERFACE FOR ENCODING DATA AND CLOCK SIGNALS
4
Patent #:
7113001
Issue Dt:
09/26/2006
Application #:
10730445
Filing Dt:
12/08/2003
Publication #:
US20050122135
Pub Dt:
06/09/2005
Title:
CHIP TO CHIP INTERFACE
5
Patent #:
7005385
Issue Dt:
02/28/2006
Application #:
10734593
Filing Dt:
12/15/2003
Publication #:
US20050130421
Pub Dt:
06/16/2005
Title:
METHOD FOR REMOVING A RESIST MASK WITH HIGH SELECTIVITY TO A CARBON HARD MASK USED FOR SEMICONDUCTOR STRUCTURING
6
Patent #:
7015092
Issue Dt:
03/21/2006
Application #:
10740026
Filing Dt:
12/18/2003
Publication #:
US20050136631
Pub Dt:
06/23/2005
Title:
METHODS FOR FORMING VERTICAL GATE TRANSISTORS PROVIDING IMPROVED ISOLATION AND ALIGNMENT OF VERTICAL GATE CONTACTS
7
Patent #:
7003432
Issue Dt:
02/21/2006
Application #:
10749460
Filing Dt:
12/30/2003
Publication #:
US20050149285
Pub Dt:
07/07/2005
Title:
METHOD OF AND SYSTEM FOR ANALYZING CELLS OF A MEMORY DEVICE
8
Patent #:
7300875
Issue Dt:
11/27/2007
Application #:
10777608
Filing Dt:
02/11/2004
Publication #:
US20050227471
Pub Dt:
10/13/2005
Title:
POST METAL CHEMICAL MECHANICAL POLISHING DRY CLEANING
9
Patent #:
7422930
Issue Dt:
09/09/2008
Application #:
10790907
Filing Dt:
03/02/2004
Publication #:
US20050194674
Pub Dt:
09/08/2005
Title:
INTEGRATED CIRCUIT WITH RE-ROUTE LAYER AND STACKED DIE ASSEMBLY
10
Patent #:
7041545
Issue Dt:
05/09/2006
Application #:
10795611
Filing Dt:
03/08/2004
Publication #:
US20050196922
Pub Dt:
09/08/2005
Title:
METHOD FOR PRODUCING SEMICONDUCTOR MEMORY DEVICES AND INTEGRATED MEMORY DEVICE
11
Patent #:
7142478
Issue Dt:
11/28/2006
Application #:
10804840
Filing Dt:
03/19/2004
Publication #:
US20050206410
Pub Dt:
09/22/2005
Title:
CLOCK STOP DETECTOR
12
Patent #:
7171327
Issue Dt:
01/30/2007
Application #:
10808190
Filing Dt:
03/24/2004
Publication #:
US20050216220
Pub Dt:
09/29/2005
Title:
TEMPERATURE SENSOR SCHEME
13
Patent #:
7113010
Issue Dt:
09/26/2006
Application #:
10809826
Filing Dt:
03/26/2004
Publication #:
US20050212573
Pub Dt:
09/29/2005
Title:
CLOCK DISTORTION DETECTOR USING A SYNCHRONOUS MIRROR DELAY CIRCUIT
14
Patent #:
7414257
Issue Dt:
08/19/2008
Application #:
10812991
Filing Dt:
03/31/2004
Publication #:
US20050219800
Pub Dt:
10/06/2005
Title:
SWITCHING DEVICE FOR CONFIGURABLE INTERCONNECT AND METHOD FOR PREPARING THE SAME
15
Patent #:
6972226
Issue Dt:
12/06/2005
Application #:
10815223
Filing Dt:
03/31/2004
Publication #:
US20050227426
Pub Dt:
10/13/2005
Title:
CHARGE-TRAPPING MEMORY CELL ARRAY AND METHOD FOR PRODUCTION
16
Patent #:
6953893
Issue Dt:
10/11/2005
Application #:
10815224
Filing Dt:
03/31/2004
Publication #:
US20050217885
Pub Dt:
10/06/2005
Title:
CIRCUIT BOARD FOR CONNECTING AN INTEGRATED CIRCUIT TO A SUPPORT AND IC BGA PACKAGE USING SAME
17
Patent #:
7124052
Issue Dt:
10/17/2006
Application #:
10820292
Filing Dt:
04/08/2004
Publication #:
US20050228612
Pub Dt:
10/13/2005
Title:
MULTICHIP PACKAGE WITH CLOCK FREQUENCY ADJUSTMENT
18
Patent #:
7061305
Issue Dt:
06/13/2006
Application #:
10826840
Filing Dt:
04/16/2004
Publication #:
US20050231268
Pub Dt:
10/20/2005
Title:
THRESHOLD VOLTAGE DETECTOR FOR PROCESS EFFECT COMPENSATION
19
Patent #:
7042786
Issue Dt:
05/09/2006
Application #:
10832117
Filing Dt:
04/26/2004
Publication #:
US20050237837
Pub Dt:
10/27/2005
Title:
MEMORY WITH ADJUSTABLE ACCESS TIME
20
Patent #:
7088128
Issue Dt:
08/08/2006
Application #:
10833927
Filing Dt:
04/28/2004
Publication #:
US20050242829
Pub Dt:
11/03/2005
Title:
CIRCUIT MODULE
21
Patent #:
7186922
Issue Dt:
03/06/2007
Application #:
10833948
Filing Dt:
04/28/2004
Publication #:
US20050241849
Pub Dt:
11/03/2005
Title:
CIRCUIT BOARD
22
Patent #:
6972427
Issue Dt:
12/06/2005
Application #:
10834276
Filing Dt:
04/29/2004
Publication #:
US20050242337
Pub Dt:
11/03/2005
Title:
SWITCHING DEVICE FOR RECONFIGURABLE INTERCONNECT AND METHOD FOR MAKING THE SAME
23
Patent #:
7087950
Issue Dt:
08/08/2006
Application #:
10835390
Filing Dt:
04/30/2004
Publication #:
US20050242388
Pub Dt:
11/03/2005
Title:
FLASH MEMORY CELL, FLASH MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
24
Patent #:
7024326
Issue Dt:
04/04/2006
Application #:
10835393
Filing Dt:
04/30/2004
Publication #:
US20050246118
Pub Dt:
11/03/2005
Title:
METHOD OF OPTIMIZING THE TIMING BETWEEN SIGNALS
25
Patent #:
7298656
Issue Dt:
11/20/2007
Application #:
10836753
Filing Dt:
04/30/2004
Publication #:
US20050246598
Pub Dt:
11/03/2005
Title:
PROCESS MONITORING BY COMPARING DELAYS PROPORTIONAL TO TEST VOLTAGES AND REFERENCE VOLTAGES
26
Patent #:
7005904
Issue Dt:
02/28/2006
Application #:
10836754
Filing Dt:
04/30/2004
Publication #:
US20050242857
Pub Dt:
11/03/2005
Title:
DUTY CYCLE CORRECTION
27
Patent #:
7246291
Issue Dt:
07/17/2007
Application #:
10838535
Filing Dt:
05/04/2004
Publication #:
US20050251718
Pub Dt:
11/10/2005
Title:
METHOD FOR LOCALIZATION AND GENERATION OF SHORT CRITICAL SEQUENCE
28
Patent #:
7060529
Issue Dt:
06/13/2006
Application #:
10841162
Filing Dt:
05/07/2004
Publication #:
US20050001298
Pub Dt:
01/06/2005
Title:
MULTIPLE CHIP SEMICONDUCTOR ARRANGEMENT HAVING ELECTRICAL COMPONENTS IN SEPARATING REGIONS
29
Patent #:
7129753
Issue Dt:
10/31/2006
Application #:
10854463
Filing Dt:
05/26/2004
Publication #:
US20050265062
Pub Dt:
12/01/2005
Title:
CHIP TO CHIP INTERFACE
30
Patent #:
7421031
Issue Dt:
09/02/2008
Application #:
10855946
Filing Dt:
05/28/2004
Publication #:
US20050265464
Pub Dt:
12/01/2005
Title:
METHOD FOR INITIALIZING THE COMPUTATION OF A QUASI-PERIODIC STEADY STATE OF A MULTI-TONE SYSTEM
31
Patent #:
7053681
Issue Dt:
05/30/2006
Application #:
10863516
Filing Dt:
06/09/2004
Publication #:
US20050275434
Pub Dt:
12/15/2005
Title:
COMPARATOR AND METHOD FOR AMPLIFYING AN INPUT SIGNAL
32
Patent #:
7298182
Issue Dt:
11/20/2007
Application #:
10867896
Filing Dt:
06/15/2004
Publication #:
US20050275435
Pub Dt:
12/15/2005
Title:
COMPARATOR USING DIFFERENTIAL AMPLIFIER WITH REDUCED CURRENT CONSUMPTION
33
Patent #:
7193883
Issue Dt:
03/20/2007
Application #:
10870100
Filing Dt:
06/17/2004
Publication #:
US20050281074
Pub Dt:
12/22/2005
Title:
INPUT RETURN PATH BASED ON VDDQ/VSSQ
34
Patent #:
6977181
Issue Dt:
12/20/2005
Application #:
10870780
Filing Dt:
06/17/2004
Publication #:
US20050282295
Pub Dt:
12/22/2005
Title:
MTJ STACK WITH CRYSTALLIZATION INHIBITING LAYER
35
Patent #:
7060566
Issue Dt:
06/13/2006
Application #:
10873010
Filing Dt:
06/22/2004
Publication #:
US20050280083
Pub Dt:
12/22/2005
Title:
STANDBY CURRENT REDUCTION OVER A PROCESS WINDOW WITH A TRIMMABLE WELL BIAS
36
Patent #:
7071724
Issue Dt:
07/04/2006
Application #:
10877299
Filing Dt:
06/25/2004
Publication #:
US20050285614
Pub Dt:
12/29/2005
Title:
WAFER PROBECARD INTERFACE
37
Patent #:
7330040
Issue Dt:
02/12/2008
Application #:
10877649
Filing Dt:
06/25/2004
Publication #:
US20050285610
Pub Dt:
12/29/2005
Title:
TEST CIRCUITRY WAFER
38
Patent #:
7198959
Issue Dt:
04/03/2007
Application #:
10881338
Filing Dt:
06/30/2004
Publication #:
US20060003469
Pub Dt:
01/05/2006
Title:
PROCESS FOR FABRICATION OF A FERROCAPACITOR
39
Patent #:
7187221
Issue Dt:
03/06/2007
Application #:
10881598
Filing Dt:
06/30/2004
Publication #:
US20060001462
Pub Dt:
01/05/2006
Title:
DIGITAL DUTY CYCLE CORRECTOR
40
Patent #:
7289374
Issue Dt:
10/30/2007
Application #:
10882592
Filing Dt:
07/01/2004
Publication #:
US20060003715
Pub Dt:
01/05/2006
Title:
CIRCUIT AND METHOD FOR ADJUSTING THRESHOLD DRIFT OVER TEMPERATURE IN A CMOS RECEIVER
41
Patent #:
7259061
Issue Dt:
08/21/2007
Application #:
10891051
Filing Dt:
07/15/2004
Publication #:
US20060014343
Pub Dt:
01/19/2006
Title:
METHOD FOR FORMING A CAPACITOR FOR AN INTEGRATED CIRCUIT AND INTEGRATED CIRCUIT
42
Patent #:
7223612
Issue Dt:
05/29/2007
Application #:
10899253
Filing Dt:
07/26/2004
Publication #:
US20060017180
Pub Dt:
01/26/2006
Title:
ALIGNMENT OF MTJ STACK TO CONDUCTIVE LINES IN THE ABSENCE OF TOPOGRAPHY
43
Patent #:
7442624
Issue Dt:
10/28/2008
Application #:
10909599
Filing Dt:
08/02/2004
Publication #:
US20060024923
Pub Dt:
02/02/2006
Title:
DEEP ALIGNMENT MARKS ON EDGE CHIPS FOR SUBSEQUENT ALIGNMENT OF OPAQUE LAYERS
44
Patent #:
7120070
Issue Dt:
10/10/2006
Application #:
10930132
Filing Dt:
08/31/2004
Publication #:
US20060048022
Pub Dt:
03/02/2006
Title:
METHOD FOR TESTING THE SERVICEABILITY OF BIT LINES IN A DRAM MEMORY DEVICE
45
Patent #:
7251178
Issue Dt:
07/31/2007
Application #:
10937155
Filing Dt:
09/07/2004
Publication #:
US20060050584
Pub Dt:
03/09/2006
Title:
CURRENT SENSE AMPLIFIER
46
Patent #:
7319223
Issue Dt:
01/15/2008
Application #:
10940490
Filing Dt:
09/14/2004
Publication #:
US20060054812
Pub Dt:
03/16/2006
Title:
METHOD AND APPARATUS FOR CHARACTERIZING A RECESS LOCATED ON A SURFACE OF A SUBSTRATE
47
Patent #:
7235859
Issue Dt:
06/26/2007
Application #:
10957492
Filing Dt:
10/01/2004
Publication #:
US20050258506
Pub Dt:
11/24/2005
Title:
ARRANGEMENT AND PROCESS FOR PROTECTING FUSES/ANTI-FUSES
48
Patent #:
7402487
Issue Dt:
07/22/2008
Application #:
10967465
Filing Dt:
10/18/2004
Publication #:
US20060084222
Pub Dt:
04/20/2006
Title:
PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING DEEP TRENCH STRUCTURES
49
Patent #:
7215595
Issue Dt:
05/08/2007
Application #:
10967899
Filing Dt:
10/18/2004
Publication #:
US20050111275
Pub Dt:
05/26/2005
Title:
MEMORY DEVICE AND METHOD USING A SENSE AMPLIFIER AS A CACHE
50
Patent #:
7304721
Issue Dt:
12/04/2007
Application #:
10984797
Filing Dt:
11/10/2004
Publication #:
US20050125164
Pub Dt:
06/09/2005
Title:
METHOD FOR DYNAMICALLY MONITORING A RETICLE
51
Patent #:
7180313
Issue Dt:
02/20/2007
Application #:
10995111
Filing Dt:
11/24/2004
Publication #:
US20050162176
Pub Dt:
07/28/2005
Title:
TEST DEVICE FOR WAFER TESTING DIGITAL SEMICONDUCTOR CIRCUITS
52
Patent #:
7259060
Issue Dt:
08/21/2007
Application #:
10995677
Filing Dt:
11/23/2004
Publication #:
US20050124124
Pub Dt:
06/09/2005
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE
53
Patent #:
7102911
Issue Dt:
09/05/2006
Application #:
11004880
Filing Dt:
12/07/2004
Publication #:
US20050128796
Pub Dt:
06/16/2005
Title:
METHOD FOR IMPROVING THE READ SIGNAL IN A MEMORY HAVING PASSIVE MEMORY ELEMENTS
54
Patent #:
7042773
Issue Dt:
05/09/2006
Application #:
11008159
Filing Dt:
12/10/2004
Publication #:
US20050135163
Pub Dt:
06/23/2005
Title:
INTEGRATED CIRCUIT FOR STORING OPERATING PARAMETERS
55
Patent #:
7005640
Issue Dt:
02/28/2006
Application #:
11008643
Filing Dt:
12/10/2004
Publication #:
US20050139768
Pub Dt:
06/30/2005
Title:
METHOD AND APPARATUS FOR THE CHARACTERIZATION OF A DEPTH STRUCTURE IN A SUBSTRATE
56
Patent #:
7392582
Issue Dt:
07/01/2008
Application #:
11008648
Filing Dt:
12/10/2004
Publication #:
US20050125994
Pub Dt:
06/16/2005
Title:
SOCKET AND/OR ADAPTER DEVICE, AND AN APPARATUS AND PROCESS FOR LOADING A SOCKET AND/OR ADAPTER DEVICE WITH A CORRESPONDING SEMI-CONDUCTOR COMPONENT
57
Patent #:
7198403
Issue Dt:
04/03/2007
Application #:
11009969
Filing Dt:
12/10/2004
Publication #:
US20050226309
Pub Dt:
10/13/2005
Title:
ARRANGEMENT FOR DETERMINING A TEMPERATURE LOADING OF AN INTEGRATED CIRCUIT AND METHOD
58
Patent #:
7453259
Issue Dt:
11/18/2008
Application #:
11012715
Filing Dt:
12/16/2004
Publication #:
US20050170689
Pub Dt:
08/04/2005
Title:
LOADING A SOCKET AND/OR ADAPTER DEVICE WITH A SEMICONDUCTOR COMPONENT
59
Patent #:
7193426
Issue Dt:
03/20/2007
Application #:
11013873
Filing Dt:
12/16/2004
Publication #:
US20050156612
Pub Dt:
07/21/2005
Title:
TEST SYSTEM AND TEST STRUCTURE FOR TESTING AN INTEGRATED CIRCUIT AND AN INTEGRATED CIRCUIT HAVING A TEST STRUCTURE
60
Patent #:
6963514
Issue Dt:
11/08/2005
Application #:
11017857
Filing Dt:
12/22/2004
Publication #:
US20050162949
Pub Dt:
07/28/2005
Title:
METHOD FOR TESTING AN INTEGRATED SEMICONDUCTOR MEMORY, AND INTEGRATED SEMICONDUCTOR MEMORY
61
Patent #:
7356718
Issue Dt:
04/08/2008
Application #:
11032535
Filing Dt:
01/10/2005
Publication #:
US20050179461
Pub Dt:
08/18/2005
Title:
SEMICONDUCTOR MEMORY CIRCUIT AND METHOD FOR OPERATING THE SAME IN A STANDBY MODE
62
Patent #:
7463074
Issue Dt:
12/09/2008
Application #:
11032536
Filing Dt:
01/10/2005
Publication #:
US20050179477
Pub Dt:
08/18/2005
Title:
INTEGRATED CIRCUIT AND METHOD FOR GENERATING A READY SIGNAL
63
Patent #:
7330047
Issue Dt:
02/12/2008
Application #:
11033988
Filing Dt:
01/13/2005
Publication #:
US20050156624
Pub Dt:
07/21/2005
Title:
RECEIVER CIRCUIT ARRANGEMENT HAVING AN INVERTER CIRCUIT
64
Patent #:
7254758
Issue Dt:
08/07/2007
Application #:
11034236
Filing Dt:
01/12/2005
Publication #:
US20050190629
Pub Dt:
09/01/2005
Title:
METHOD AND APPARATUS FOR TESTING CIRCUIT UNITS TO BE TESTED WITH DIFFERENT TEST MODE DATA SETS
65
Patent #:
7235447
Issue Dt:
06/26/2007
Application #:
11035705
Filing Dt:
01/14/2005
Publication #:
US20050173729
Pub Dt:
08/11/2005
Title:
FABRICATION METHOD FOR A SEMICONDUCTOR STRUCTURE AND CORRESPONDING SEMICONDUCTOR STRUCTURE
66
Patent #:
7304515
Issue Dt:
12/04/2007
Application #:
11041878
Filing Dt:
01/25/2005
Publication #:
US20050179478
Pub Dt:
08/18/2005
Title:
DEVICE TO BE USED IN THE SYNCHRONIZATION OF CLOCK PULSES, AS WELL AS A CLOCK PULSE SYNCHRONIZATION PROCESS
67
Patent #:
7206248
Issue Dt:
04/17/2007
Application #:
11043949
Filing Dt:
01/28/2005
Publication #:
US20050169088
Pub Dt:
08/04/2005
Title:
VOLTAGE BOOSTER DEVICE FOR SEMI-CONDUCTOR COMPONENTS
68
Patent #:
7405028
Issue Dt:
07/29/2008
Application #:
11044728
Filing Dt:
01/28/2005
Publication #:
US20050170283
Pub Dt:
08/04/2005
Title:
POLYMERS BASED ON CINNAMIC ACID AS A BOTTOM ANTIREFLECTIVE COATING FOR 157 NM PHOTOLITHOGRAPHY
69
Patent #:
7238964
Issue Dt:
07/03/2007
Application #:
11044762
Filing Dt:
01/27/2005
Publication #:
US20050179033
Pub Dt:
08/18/2005
Title:
MEMORY CELL, METHOD FOR THE PRODUCTION THEREOF AND USE OF A COMPOSITION THEREFOR
70
Patent #:
7312652
Issue Dt:
12/25/2007
Application #:
11044995
Filing Dt:
01/28/2005
Publication #:
US20050168271
Pub Dt:
08/04/2005
Title:
VOLTAGE REGULATION SYSTEM
71
Patent #:
7172966
Issue Dt:
02/06/2007
Application #:
11046663
Filing Dt:
01/28/2005
Publication #:
US20050186786
Pub Dt:
08/25/2005
Title:
METHOD FOR FABRICATING METALLIC INTERCONNECTS ON ELECTRONIC COMPONENTS
72
Patent #:
7202547
Issue Dt:
04/10/2007
Application #:
11046905
Filing Dt:
02/01/2005
Publication #:
US20050167660
Pub Dt:
08/04/2005
Title:
CAPACITOR WITH A DIELECTRIC INCLUDING A SELF-ORGANIZED MONOLAYER OF AN ORGANIC COMPOUND
73
Patent #:
7313044
Issue Dt:
12/25/2007
Application #:
11050428
Filing Dt:
02/04/2005
Publication #:
US20050174164
Pub Dt:
08/11/2005
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH TEMPERATURE-DEPENDENT VOLTAGE GENERATION
74
Patent #:
7236412
Issue Dt:
06/26/2007
Application #:
11053659
Filing Dt:
02/09/2005
Publication #:
US20050174863
Pub Dt:
08/11/2005
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH REDUNDANT MEMORY CELLS REPLACEABLE FOR EITHER TRUE OR COMPLEMENTARY DEFECTIVE MEMORY CELLS
75
Patent #:
7157382
Issue Dt:
01/02/2007
Application #:
11053668
Filing Dt:
02/09/2005
Publication #:
US20050176256
Pub Dt:
08/11/2005
Title:
METHOD FOR EXPANDING A TRENCH IN A SEMICONDUCTOR STRUCTURE
76
Patent #:
7122423
Issue Dt:
10/17/2006
Application #:
11055431
Filing Dt:
02/10/2005
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
PARALLEL-SERIAL CONVERTER
Assignor
1
INFINEON TECHNOLOGIES AG
Exec Dt:
07/08/2015
Assignee
1
POLARIS INNOVATIONS LIMITED
29 EARLSFORT TERRACE, DUBLIN 2
DUBLIN, IRELAND
Correspondence name and address
POLARIS INNOVATIONS LIMITED
303 TERRY FOX DRIVE, SUITE 300
OTTAWA, K2K 3J1 CANADA

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