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03/25/2010
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02/18/2014
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03/25/2010
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01/26/2010
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01/15/2009
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03/16/2010
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09/23/2008
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01/29/2009
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08/17/2010
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09/23/2008
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03/25/2010
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09/10/2013
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03/25/2010
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04/19/2011
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09/24/2008
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01/15/2009
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01/18/2011
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01/15/2009
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08/09/2011
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09/24/2008
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03/25/2010
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02/07/2012
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03/25/2010
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03/22/2011
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03/25/2010
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12/28/2010
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03/25/2010
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11/22/2011
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09/26/2008
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04/01/2010
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08/12/2014
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04/01/2010
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08/12/2014
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04/01/2010
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06/08/2010
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10/09/2008
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04/15/2010
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03/22/2016
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04/29/2010
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11/30/2010
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11/06/2008
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01/14/2010
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09/20/2011
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11/17/2008
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05/20/2010
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01/31/2012
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05/20/2010
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09/20/2011
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11/17/2008
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05/20/2010
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08/09/2011
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11/18/2008
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05/20/2010
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03/06/2012
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11/18/2008
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05/20/2010
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03/24/2015
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05/20/2010
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12/20/2011
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05/20/2010
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11/30/2010
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05/27/2010
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05/31/2011
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06/03/2010
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06/03/2010
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06/18/2009
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06/10/2010
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06/10/2010
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11/22/2011
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06/10/2010
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06/10/2010
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06/10/2010
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08/09/2011
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12/05/2008
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06/10/2010
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06/10/2010
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01/04/2011
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12/05/2008
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06/10/2010
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12/28/2010
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06/10/2010
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12/08/2008
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06/10/2010
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12/08/2008
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06/10/2010
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03/26/2013
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12/09/2008
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06/10/2010
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05/31/2011
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12/09/2008
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06/10/2010
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04/05/2011
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12/09/2008
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06/10/2010
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11/05/2013
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12/10/2008
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07/02/2009
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08/17/2010
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12/10/2008
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06/10/2010
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
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12/10/2008
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06/10/2010
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02/23/2010
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12/10/2008
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06/22/2010
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12/10/2008
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06/10/2010
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02/09/2016
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12332253
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12/10/2008
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06/10/2010
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09/21/2010
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12332277
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12/10/2008
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06/10/2010
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10/09/2012
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12332318
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12/10/2008
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06/10/2010
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A CONDUCTIVE VIA-IN-VIA STRUCTURE
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09/13/2011
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Application #:
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12332325
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Filing Dt:
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12/10/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPLIANT POLYMER LAYER BETWEEN UBM AND CONFORMAL DIELECTRIC LAYER/RDL FOR STRESS RELIEF
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Patent #:
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03/20/2012
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12332799
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12/11/2008
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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DOUBLE-SIDED SEMICONDUCTOR DEVICE AND METHOD OF FORMING TOP-SIDE AND BOTTOM-SIDE INTERCONNECT STRUCTURES
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12/02/2014
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12332835
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12/11/2008
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING TOPSIDE AND BOTTOM-SIDE INTERCONNECT STRUCTURES AROUND CORE DIE WITH TSV
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12/28/2010
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Application #:
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12333297
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12/11/2008
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING THROUGH SILICON VIA WITH DIRECT INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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05/13/2014
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12333298
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12/11/2008
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INPUT/OUTPUT EXPANSION
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01/05/2010
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Application #:
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12333977
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12/12/2008
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A VERTICAL INTERCONNECT STRUCTURE FOR 3-D FO-WLCSP
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Patent #:
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08/31/2010
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12334347
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12/12/2008
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING THROUGH SILICON VIAS WITH PARTIAL DEPTH METAL FILL REGIONS AND METHOD OF MANUFACTURE THEREOF
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06/22/2010
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12336141
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12/16/2008
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Publication #:
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Pub Dt:
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04/16/2009
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Title:
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INTEGRATED CIRCUIT UNDERFILL PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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12340638
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Filing Dt:
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12/19/2008
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Publication #:
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Pub Dt:
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06/24/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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12353020
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01/13/2009
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Publication #:
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Pub Dt:
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06/04/2009
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Title:
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LEADED STACKED PACKAGES HAVING ELEVATED DIE PADDLE
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Patent #:
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Issue Dt:
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06/15/2010
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Application #:
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12353489
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01/14/2009
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Publication #:
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Pub Dt:
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06/25/2009
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Title:
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OPTICAL DIE-DOWN QUAD FLAT NON-LEADED PACKAGE
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Patent #:
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02/08/2011
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Application #:
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12360644
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01/27/2009
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Publication #:
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Pub Dt:
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05/28/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CARRIER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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10/02/2012
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Application #:
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12362627
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01/30/2009
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Publication #:
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Pub Dt:
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07/23/2009
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Title:
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FLIP CHIP INTERCONNECT SOLDER MASK
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02/04/2014
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12371730
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02/16/2009
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Pub Dt:
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06/11/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/26/2011
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12388516
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02/18/2009
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Pub Dt:
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08/19/2010
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Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH THROUGH VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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12391807
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02/24/2009
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
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Patent #:
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Issue Dt:
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06/08/2010
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Application #:
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12393034
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02/25/2009
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06/25/2009
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Title:
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CHIP CARRIER AND FABRICATION METHOD
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Issue Dt:
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10/11/2011
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12398163
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03/04/2009
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Publication #:
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Pub Dt:
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07/09/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SLUG
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Patent #:
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01/31/2012
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12398466
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03/05/2009
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Pub Dt:
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09/09/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL BOARD-ON-CHIP STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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07/12/2011
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12398782
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03/05/2009
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Publication #:
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Pub Dt:
|
09/09/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED DIE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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06/14/2011
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12398806
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03/05/2009
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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LEADFRAME DESIGN FOR QFN PACKAGE WITH TOP TERMINAL LEADS
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Patent #:
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10/11/2011
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12403234
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03/12/2009
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Publication #:
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Pub Dt:
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09/16/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF INTEGRATING BALUN AND RF COUPLER ON A COMMON SUBSTRATE
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Patent #:
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Issue Dt:
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01/10/2012
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12404069
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03/13/2009
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Publication #:
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Pub Dt:
|
09/16/2010
| | | | |
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Title:
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SEMICONDUCTOR DIE AND METHOD OF FORMING NOISE ABSORBING REGIONS BETWEEN THVS IN PERIPHERAL REGION OF THE DIE
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08/02/2011
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12404134
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03/13/2009
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Pub Dt:
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09/16/2010
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THREE-DIMENSIONAL VERTICALLY ORIENTED INTEGRATED CAPACITORS
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08/26/2014
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12404279
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03/13/2009
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Pub Dt:
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09/24/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-IN-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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09/04/2012
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12406038
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03/17/2009
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Pub Dt:
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09/23/2010
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Title:
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MAKING A SEMICONDUCTOR DEVICE HAVING CONDUCTIVE THROUGH ORGANIC VIAS
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03/13/2012
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12406049
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03/17/2009
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Pub Dt:
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09/23/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
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Patent #:
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NONE
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12407949
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03/20/2009
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Pub Dt:
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09/23/2010
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Title:
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Semiconductor Substrate and Method of Forming Conformal Solder Wet-Enhancement Layer on Bump-on-Lead Site
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NONE
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12408641
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03/20/2009
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Pub Dt:
|
09/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDED CONNECTION AND METHOD OF MANUFACTURE THEREOF
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01/04/2011
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12408662
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03/20/2009
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Pub Dt:
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09/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LAYERED PACKAGING AND METHOD OF MANUFACTURE THEREOF
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01/07/2014
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12408670
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03/20/2009
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Pub Dt:
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09/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERPOSER AND METHOD OF MANUFACTURE THEREOF
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01/17/2012
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12409142
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03/23/2009
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Pub Dt:
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09/23/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING PRE-FABRICATED SHIELDING FRAME OVER SEMICONDUCTOR DIE
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Issue Dt:
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06/21/2011
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12409489
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03/24/2009
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Pub Dt:
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07/16/2009
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Title:
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STACKED SEMICONDUCTOR PACKAGE ASSEMBLY HAVING HOLLOWED SUBSTRATE
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Issue Dt:
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05/18/2010
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12409491
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03/24/2009
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Pub Dt:
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07/16/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/01/2013
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12410213
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03/24/2009
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Pub Dt:
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03/25/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
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08/02/2011
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12410260
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03/24/2009
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Pub Dt:
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09/30/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ENHANCED UBM STRUCTURE FOR IMPROVING SOLDER JOINT RELIABILITY
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04/24/2012
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12410312
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03/24/2009
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Pub Dt:
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09/30/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING NO-FLOW UNDERFILL MATERIAL AROUND VERTICAL INTERCONNECT STRUCTURE
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Issue Dt:
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09/20/2011
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12410463
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03/25/2009
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Pub Dt:
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07/16/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER SUPPORT
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Issue Dt:
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04/29/2014
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12410945
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03/25/2009
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTEGRAL-INTERPOSER-STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/26/2013
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12410983
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03/25/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED CONFIGURATION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/27/2012
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12411040
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03/25/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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12411154
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03/25/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE UNDERFILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/19/2013
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Application #:
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12411310
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03/25/2009
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Pub Dt:
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09/30/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER BETWEEN STACKED SEMICONDUCTOR DIE
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Issue Dt:
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08/27/2013
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12411390
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03/25/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-STACKED FLIP CHIPS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/07/2010
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12412064
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03/26/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/10/2013
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12412279
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03/26/2009
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Pub Dt:
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09/30/2010
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Title:
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Semiconductor Device and Method of Forming a Thin Wafer Without a Carrier
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07/10/2012
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12412303
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03/26/2009
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Pub Dt:
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10/08/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL SYSTEM AND METHOD OF MANUFACTURE THEREOF
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08/23/2011
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12412312
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03/26/2009
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Pub Dt:
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09/30/2010
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH Z-INTERCONNECTS HAVING TRACES AND METHOD OF MANUFACTURE THEREOF
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04/09/2013
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12412315
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03/26/2009
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SPREADER AND METHOD OF MANUFACTURE THEREOF
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