Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 021990/0751 | |
| Pages: | 5 |
| | Recorded: | 12/17/2008 | | |
Attorney Dkt #: | JAN09 WK 1 CPA ISSUE FEES |
Conveyance: | CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). |
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Total properties:
7
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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10147830
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Filing Dt:
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05/17/2002
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Publication #:
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Pub Dt:
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11/20/2003
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Title:
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PASSIVE NETWORK MONITORING SYSTEM
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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10730926
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Filing Dt:
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12/10/2003
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Publication #:
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Pub Dt:
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06/16/2005
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Title:
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FLOW-BASED METHOD FOR TRACKING BACK SINGLE PACKETS
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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10820111
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Filing Dt:
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04/08/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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CENTRALIZED INTERNET PROTOCOL/MULTI-PROTOCOL LABEL SWITCHING CONNECTIVITY VERIFICATION IN A COMMUNICATIONS NETWORK MANAGEMENT CONTEXT
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Patent #:
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Issue Dt:
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02/10/2009
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Application #:
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10834129
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Filing Dt:
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04/29/2004
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Publication #:
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Pub Dt:
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11/03/2005
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Title:
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SILENT DATAPATH FAILURE DETECTION
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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11243388
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Filing Dt:
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10/04/2005
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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MANAGEMENT OF TIERED COMMUNICATION SERVICES IN A COMPOSITE COMMUNICATION SERVICE
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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11247146
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Filing Dt:
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10/12/2005
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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DEVICE FOR LOCALLY CONTROLLING ONE OR MORE PARAMETERS OF A CONNECTION TO BE SET UP, FOR AN ELEMENT OF AN ETHERNET COMMUNICATIONS NETWORK WITH A GMPLS CONTROL PLAN
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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11366661
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Filing Dt:
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03/03/2006
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Publication #:
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Pub Dt:
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09/06/2007
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Title:
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IMPLEMENTING A MICROPROCESSOR BOOT CONFIGURATION PROM WITHIN AN FPGA
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Assignee
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54, RUE LA BOETIE |
PARIS, FRANCE 75008 |
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Correspondence name and address
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GREGORY J. MURGIA
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3400 W. PLANO PARKWAY
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MS LEGL2
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PLANO, TX 75075
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