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Total properties:
28
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08979297
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Filing Dt:
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11/26/1997
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Title:
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METHOD FOR REMOVING ETCHING RESIDUES AND CONTAMINANTS
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Patent #:
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Issue Dt:
|
03/07/2000
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Application #:
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09049531
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Filing Dt:
|
03/27/1998
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Title:
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MOLD FOR NON - PHOTOLITHOGRAPHIC FABRICATION OF MICROSTRUCTURES
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Patent #:
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Issue Dt:
|
05/14/2002
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Application #:
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09095468
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Filing Dt:
|
06/10/1998
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Title:
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SINGLE CRYSTAL SILICON ON POLYCRYSTALLINE SILLICON INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
09/19/2000
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Application #:
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09138741
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Filing Dt:
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08/24/1998
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Title:
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METHOD FOR CONTROLLED IMPLANTATION OF ELEMENTS INTO THE SURFACE OR NEAR SURFACE OF A SUBSTRATE
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Patent #:
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Issue Dt:
|
09/12/2000
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Application #:
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09193832
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Filing Dt:
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11/17/1998
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Title:
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HEATSPREADER FOR A FLIP CHIP DEVICE, AND METHOD FOR CONNECTING THE HEATSPREADER
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Patent #:
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Issue Dt:
|
04/03/2001
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Application #:
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09241458
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Filing Dt:
|
02/02/1999
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Title:
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ARTICLE FOR DE-EMBEDDING PARASITICS IN INTEGRATED CIRCUITS
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|
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Patent #:
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Issue Dt:
|
04/10/2001
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Application #:
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09246402
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Filing Dt:
|
02/08/1999
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Title:
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METHOD FOR FABRICATING A MERGED INTEGRATED CIRCUIT DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
03/26/2002
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Application #:
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09337966
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Filing Dt:
|
06/22/1999
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Title:
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SCANNING ELECTRON MICROSCOPE/ENERGY DISPERSIVE SPECTROSCOPY SAMPLE PREPARATION METHOD AND SAMPLE PRODUCED THEREBY
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Patent #:
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Issue Dt:
|
10/16/2001
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Application #:
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09339894
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Filing Dt:
|
06/25/1999
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Title:
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CHARGE INJECTION TRANSISTOR USING HIGH-K DIELECTRIC BARRIER LAYER
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|
|
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Patent #:
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Issue Dt:
|
11/20/2001
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Application #:
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09339895
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Filing Dt:
|
06/25/1999
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Title:
|
GATE STRUCTURE FOR INTEGRATED CIRCUIT FABRICATION
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|
|
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Patent #:
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Issue Dt:
|
03/27/2001
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Application #:
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09363769
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Filing Dt:
|
07/29/1999
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|
Title:
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METHOD FOR MAKING AN INTEGRATED CIRCUIT INCLUDING HIGH AND LOW VOLTAGE TRANSISTORS
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|
|
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Patent #:
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Issue Dt:
|
11/06/2001
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Application #:
|
09385165
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Filing Dt:
|
08/30/1999
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|
Title:
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PROCESS FOR MANUFACTURING AN INTEGRATED CIRCUIT INCLUDING A DUAL-DAMASCENE STRUCTURE AND AN INTEGRATED CIRCUIT
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|
|
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Patent #:
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|
Issue Dt:
|
04/02/2002
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Application #:
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09386065
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Filing Dt:
|
08/30/1999
|
|
Title:
|
PROCESS FOR MANUFACTURING AN INTEGRATED CIRCUIT INCLUDING A DUAL-DAMASCENE STRUCTURE AND AN INTEGRATED CIRCUIT
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|
|
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Patent #:
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|
Issue Dt:
|
02/26/2002
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Application #:
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09388297
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Filing Dt:
|
09/01/1999
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|
Title:
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SEMICONDUCTOR DEVICE HAVING REGIONS OF INSULATING MATERIAL FORMED IN A SEMICONDUCTOR SUBSTRATE AND PROCESS OF MAKING THE DEVICE
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|
|
|
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Patent #:
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|
Issue Dt:
|
11/20/2001
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Application #:
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09388682
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Filing Dt:
|
09/02/1999
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Title:
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INTERGRATED CIRCUIT DEVICE HAVING DUAL DAMASCENE CAPACITOR
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|
|
|
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Patent #:
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|
Issue Dt:
|
05/14/2002
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Application #:
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09390181
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Filing Dt:
|
09/07/1999
|
|
Title:
|
PLASMA CONFINEMENT SHIELD
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|
|
|
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Patent #:
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|
Issue Dt:
|
07/22/2003
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Application #:
|
09415529
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Filing Dt:
|
10/08/1999
|
|
Title:
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METHOD FOR CHEMICAL/MECHANICAL PLANARIZATION OF A SEMICONDUCTOR WAFER HAVING DISSIMILAR METAL PATTERN DENSITIES
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|
|
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Patent #:
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|
Issue Dt:
|
01/22/2002
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Application #:
|
09419259
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Filing Dt:
|
10/15/1999
|
|
Title:
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WAFER POLISHING APPARATUS AND PROCESS
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|
|
|
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Patent #:
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|
Issue Dt:
|
01/30/2001
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Application #:
|
09430226
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Filing Dt:
|
10/29/1999
|
|
Title:
|
METHOD FOR FORMING VIAS IN A LOW DIELECTRIC CONSTANT MATERIAL
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|
|
|
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Patent #:
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|
Issue Dt:
|
05/06/2003
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Application #:
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09477310
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Filing Dt:
|
01/04/2000
|
|
Title:
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PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT DEVICE HAVING CAPACITORS WITH A MULTILEVEL METALLIZATION
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|
|
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Patent #:
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|
Issue Dt:
|
06/11/2002
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Application #:
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09481463
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Filing Dt:
|
01/11/2000
|
|
Title:
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SEMICONDUCTOR DEVICE HAVING A METAL BARRIER LAYER FOR A DIELECTRIC MATERIAL HAVING A HIGH DIELECTRIC CONSTANT AND A METHOD OF MANUFACTURE THEREOF
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|
|
|
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Patent #:
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|
Issue Dt:
|
10/23/2001
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Application #:
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09497982
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Filing Dt:
|
02/04/2000
|
|
Title:
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Selective etching of thin films
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|
|
|
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Patent #:
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|
Issue Dt:
|
12/11/2001
|
Application #:
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09502868
|
Filing Dt:
|
02/11/2000
|
|
Title:
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Method for producing devices having piezoelectric films
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|
|
|
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Patent #:
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|
Issue Dt:
|
01/29/2002
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Application #:
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09503225
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Filing Dt:
|
02/11/2000
|
|
Title:
|
Method for producing piezoelectric films with rotating magnetron sputtering system
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/26/2002
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Application #:
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09510015
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Filing Dt:
|
02/22/2000
|
|
Title:
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Dark spin rinse/dry
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|
|
|
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Patent #:
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|
Issue Dt:
|
04/09/2002
|
Application #:
|
09516836
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Filing Dt:
|
03/02/2000
|
|
Title:
|
Polishing pads from closed-cell elastomer foam
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09521268
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Filing Dt:
|
03/08/2000
|
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES HAVING HIGH PRESSURE
ANNEAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09641160
|
Filing Dt:
|
08/17/2000
|
|
Title:
|
PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A METAL OXIDE OR A METAL SILICATE GATE DIELECTRIC LAYER
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|
